From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= <ville.syrjala@linux.intel.com>
Subject: Re: [PATCH v5 11/13] drm/i915/icl: Add macros for MMIO
 of DSI transcoder registers
Date: Fri, 14 Sep 2018 16:41:17 +0300
Message-ID: <20180914134117.GD5565@intel.com>
References: <1531215614-6828-1-git-send-email-madhav.chauhan@intel.com>
 <1531215614-6828-12-git-send-email-madhav.chauhan@intel.com>
 <20180719162241.GE5565@intel.com>
 <2b6bcd05-0448-023c-19e1-d8be9f190690@intel.com>
 <20180912180021.GH5565@intel.com>
 <1ed6787d-81cb-35af-47cc-a0f52fe36308@intel.com>
 <20180914122551.GX5565@intel.com>
 <241bf36a-f36f-7b09-4e96-96345288d5c1@intel.com>
 <6da1661c-3d19-800c-3602-d7ed34bfcfe8@intel.com>
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To: Madhav Chauhan <madhav.chauhan@intel.com>
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