✗ Fi.CI.BAT: failure for ICELAKE DSI DRIVER (rev6)

From: Patchwork <patchwork@emeril.freedesktop.org>
To: Madhav Chauhan <madhav.chauhan@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.BAT: failure for ICELAKE DSI DRIVER (rev6)
Date: Sun, 16 Sep 2018 18:34:54 -0000	[thread overview]
Message-ID: <20180916183454.3020.55682@emeril.freedesktop.org> (raw)
In-Reply-To: <1537095223-5184-1-git-send-email-madhav.chauhan@intel.com>

== Series Details ==

Series: ICELAKE DSI DRIVER (rev6)
URL   : https://patchwork.freedesktop.org/series/44823/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_4833 -> Patchwork_10199 =

== Summary - FAILURE ==

  Serious unknown changes coming with Patchwork_10199 absolutely need to be
  verified manually.

  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_10199, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/44823/revisions/6/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_10199:

  === IGT changes ===

    ==== Possible regressions ====

    igt@kms_chamelium@dp-edid-read:
      fi-kbl-7500u:       PASS -> WARN

== Known issues ==

  Here are the changes found in Patchwork_10199 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@gem_exec_suspend@basic-s4-devices:
      fi-blb-e6850:       PASS -> INCOMPLETE (fdo#107718)

    igt@kms_psr@primary_page_flip:
      fi-kbl-7560u:       PASS -> FAIL (fdo#107336)

    ==== Possible fixes ====

    igt@drv_selftest@live_hangcheck:
      fi-glk-j4005:       INCOMPLETE (k.org#198133, fdo#103359) -> PASS

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
      fi-icl-u:           INCOMPLETE (fdo#107713) -> PASS

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-snb-2520m:       DMESG-FAIL (fdo#103713) -> PASS

    igt@kms_setmode@basic-clone-single-crtc:
      fi-snb-2520m:       DMESG-WARN (fdo#103713) -> PASS

  fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
  fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
  fdo#107336 https://bugs.freedesktop.org/show_bug.cgi?id=107336
  fdo#107713 https://bugs.freedesktop.org/show_bug.cgi?id=107713
  fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
  k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133

== Participating hosts (46 -> 42) ==

  Missing    (4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u 

== Build changes ==

    * Linux: CI_DRM_4833 -> Patchwork_10199

  CI_DRM_4833: 75bb460b367a614d10b0fba220143bee42657d7e @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4644: 0b59bb3231ab481959528c5c7b3a98762772e1b0 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10199: 78802bf69fe2392586fa70123ec27ad2ffbd8f35 @ git://anongit.freedesktop.org/gfx-ci/linux

== Linux commits ==

78802bf69fe2 drm/i915/icl: Set max return packet size for DSI panel
2cbb64e9d49c drm/i915/icl: Define DSI panel programming registers
21de99317a80 drm/i915/icl: Enable DSI transcoders
574f03ac11ac drm/i915/icl: Define TRANS_CONF register for DSI
f3f7796930bb drm/i915/icl: Configure DSI transcoder timings
605fd9be0d02 drm/i915/icl: Define DSI transcoder timing registers
d41c7f8dd938 drm/i915/icl: Program TRANS_DDI_FUNC_CTL registers
9bdf8144d433 drm/i915/icl: Define TRANS_DDI_FUNC_CTL DSI registers
74707887f37e drm/i915/icl: Configure DSI transcoders
2ba056a34af8 drm/i915/icl: Define TRANS_DSI_FUNC_CONF register
25067852a150 drm/i915/icl: Add macros for MMIO of DSI transcoder registers
330b8eaf31ad drm/i915/icl: Get DSI transcoder for a given port
9633b65f73df drm/i915/icl: Program TA_TIMING_PARAM registers
00e8d4a4da2e drm/i915/icl: Define TA_TIMING_PARAM registers
4f586b27f1d8 drm/i915/icl: Program DSI clock and data lane timing params
c6b328ee922e drm/i915/icl: Define data/clock lanes dphy timing registers
70390672d720 drm/i915/icl: Program T_INIT_MASTER registers
95defd9d09d2 drm/i915/icl: Enable DDI Buffer
ef7b1857842d drm/i915/icl: DSI vswing programming sequence
33aac050cb0a drm/i915/icl: Configure lane sequencing of combo phy transmitter

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10199/issues.html
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