From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rodrigo Vivi Subject: Re: [PATCH] [intel-gfx] drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry. Date: Mon, 17 Sep 2018 10:02:35 -0700 Message-ID: <20180917170235.GD2309@intel.com> References: <1537202975-19652-1-git-send-email-jyoti.r.yadav@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 847AA6E2D8 for ; Mon, 17 Sep 2018 17:12:37 +0000 (UTC) Content-Disposition: inline In-Reply-To: <1537202975-19652-1-git-send-email-jyoti.r.yadav@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Jyoti Yadav Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org T24gTW9uLCBTZXAgMTcsIDIwMTggYXQgMTI6NDk6MzVQTSAtMDQwMCwgSnlvdGkgWWFkYXYgd3Jv dGU6Cj4gREM1IGFuZCBEQzYgY291bnRlciByZWdpc3RlciB0ZWxscyBhYm91dCByZXNpZGVuY3kg b2YgREM1IGFuZCBEQzYuCj4gVGhlc2UgcmVnaXN0ZXJzIGFyZSBzYW1lIGZvciBTS0wgYW5kIElD TC4KPiAKPiBTaWduZWQtb2ZmLWJ5OiBKeW90aSBZYWRhdiA8anlvdGkuci55YWRhdkBpbnRlbC5j b20+Cj4gLS0tCj4gIGRyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfZGVidWdmcy5jIHwgMyArKy0K PiAgZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9yZWcuaCAgICAgfCAxICsKPiAgMiBmaWxlcyBj aGFuZ2VkLCAzIGluc2VydGlvbnMoKyksIDEgZGVsZXRpb24oLSkKPiAKPiBkaWZmIC0tZ2l0IGEv ZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9kZWJ1Z2ZzLmMgYi9kcml2ZXJzL2dwdS9kcm0vaTkx NS9pOTE1X2RlYnVnZnMuYwo+IGluZGV4IGE1MjY1YzIuLjMyOGUzOWMgMTAwNjQ0Cj4gLS0tIGEv ZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9kZWJ1Z2ZzLmMKPiArKysgYi9kcml2ZXJzL2dwdS9k cm0vaTkxNS9pOTE1X2RlYnVnZnMuYwo+IEBAIC0yODk4LDcgKzI4OTgsOCBAQCBzdGF0aWMgaW50 IGk5MTVfZG1jX2luZm8oc3RydWN0IHNlcV9maWxlICptLCB2b2lkICp1bnVzZWQpCj4gIAkJICAg Q1NSX1ZFUlNJT05fTUlOT1IoY3NyLT52ZXJzaW9uKSk7Cj4gIAo+ICAJaWYgKElTX0tBQllMQUtF KGRldl9wcml2KSB8fAo+IC0JICAgIChJU19TS1lMQUtFKGRldl9wcml2KSAmJiBjc3ItPnZlcnNp b24gPj0gQ1NSX1ZFUlNJT04oMSwgNikpKSB7Cj4gKwkgICAgKElTX1NLWUxBS0UoZGV2X3ByaXYp ICYmIGNzci0+dmVyc2lvbiA+PSBDU1JfVkVSU0lPTigxLCA2KSkKPiArCQkoSVNfSUNFTEFLRShk ZXZfcHJpdikgJiYgY3NyLT52ZXJzaW9uID49IENTUl9WRVJTSU9OKDEsIDcpKSkgewoKV2h5IG9u IElDRUxBS0Ugd2UgbmVlZCB0byBiZSBncmVhdGVyIHRoYW4gdmVyc2lvbiAxLjc/ClNwZWNpYWxs eSBiZWNhdXNlIG91ciBvbmx5IHZlcnNpb24gc3RhcnRzIG9uIDEuNyBJIGRvbid0IGJlbGlldmUg d2Ugc2hvdWxkCmJlIGNoZWNraW5nIHZlcnNpb24gaGVyZS4KCkFsc28gU0tMIGNoZWNrIGlzIHVz ZWxlc3Mgbm93YWRheXMgYW5kIHNob3VsZCBiZSByZW1vdmVkLiBJdCBjYW1lIGZyb20KdGhlIHRp bWVzIHdlIGRpZG4ndCBoYXZlIHRpZWQgdmVyc2lvbiBvZiBrZXJuZWwgYW5kIGZpcm13YXJlLi4u CgpBbHNvIEknbSBtaXNzaW5nIENGTCwgQlhULCBHTEsgYW5kIENOTCBvbiB0aGlzIHJhbmdlIGhl cmUuLi4KClByb2JhYmx5IGdvb2QgdG8gcmVwbGFjZSBldmVyeXRoaW5nCgppZiBnZW4gPj0gOSAm JiBnZW4gPD0gMTEKCj8KCj4gIAkJc2VxX3ByaW50ZihtLCAiREMzIC0+IERDNSBjb3VudDogJWRc biIsCj4gIAkJCSAgIEk5MTVfUkVBRChTS0xfQ1NSX0RDM19EQzVfQ09VTlQpKTsKPiAgCQlzZXFf cHJpbnRmKG0sICJEQzUgLT4gREM2IGNvdW50OiAlZFxuIiwKPiBkaWZmIC0tZ2l0IGEvZHJpdmVy cy9ncHUvZHJtL2k5MTUvaTkxNV9yZWcuaCBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfcmVn LmgKPiBpbmRleCA4NTM0Zjg4Li41NzNkNWYzIDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvZ3B1L2Ry bS9pOTE1L2k5MTVfcmVnLmgKPiArKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3JlZy5o Cj4gQEAgLTY5ODUsNiArNjk4NSw3IEBAIGVudW0gewo+ICAvKiBNTUlPIGFkZHJlc3MgcmFuZ2Ug Zm9yIENTUiBwcm9ncmFtICgweDgwMDAwIC0gMHg4MkZGRikgKi8KPiAgI2RlZmluZSBDU1JfTU1J T19TVEFSVF9SQU5HRQkweDgwMDAwCj4gICNkZWZpbmUgQ1NSX01NSU9fRU5EX1JBTkdFCTB4OEZG RkYKPiArLyogREMzX0RDNSBjb3VudCBhbmQgREM1X0RDNiBjb3VudCByZWdpc3RlcnMgYXJlIHNh bWUgZm9yIFNLTCBhbmQgSUNMICovCj4gICNkZWZpbmUgU0tMX0NTUl9EQzNfREM1X0NPVU5UCV9N TUlPKDB4ODAwMzApCj4gICNkZWZpbmUgU0tMX0NTUl9EQzVfREM2X0NPVU5UCV9NTUlPKDB4ODAw MkMpCj4gICNkZWZpbmUgQlhUX0NTUl9EQzNfREM1X0NPVU5UCV9NTUlPKDB4ODAwMzgpCj4gLS0g Cj4gMS45LjEKPiAKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X18KSW50ZWwtZ2Z4IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3Jn Cmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4 Cg==