From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= Subject: [PATCH v2 3/7] drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch Date: Wed, 26 Sep 2018 12:24:23 -0700 Message-ID: <20180926192427.16352-3-jose.souza@intel.com> References: <20180926192427.16352-1-jose.souza@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 597FE89F6F for ; Wed, 26 Sep 2018 19:25:10 +0000 (UTC) In-Reply-To: <20180926192427.16352-1-jose.souza@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org Cc: Dhinakaran Pandiyan List-Id: intel-gfx@lists.freedesktop.org ZURQIHNwZWMgc3RhdGVzIDIgZGlmZmVyZW50IGJpdHMgdG8gZW5hYmxlIHNpbmsgdG8gdHJpZ2dl ciBhCmludGVycnVwdGlvbiB3aGVuIHRoZXJlIGlzIGEgQ1JDIG1pc21hdGNoLgpEUF9QU1JfQ1JD X1ZFUklGSUNBVElPTiBpcyBmb3IgUFNSIG9ubHkgYW5kCkRQX1BTUl9JUlFfSFBEX1dJVEhfQ1JD X0VSUk9SUyBpcyBmb3IgUFNSMiBvbmx5LgoKdjIoRGhpbmFrYXJhbik6IFVzaW5nIGVsc2Ugb2Yg ZGV2X3ByaXYtPnBzci5wc3IyX2VuYWJsZWQgdG8gc2V0CkRQX1BTUl9DUkNfVkVSSUZJQ0FUSU9O CgpDYzogRGhpbmFrYXJhbiBQYW5kaXlhbiA8ZGhpbmFrYXJhbi5wYW5kaXlhbkBpbnRlbC5jb20+ ClNpZ25lZC1vZmYtYnk6IEpvc8OpIFJvYmVydG8gZGUgU291emEgPGpvc2Uuc291emFAaW50ZWwu Y29tPgotLS0KIGRyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX3Bzci5jIHwgNyArKystLS0tCiAx IGZpbGUgY2hhbmdlZCwgMyBpbnNlcnRpb25zKCspLCA0IGRlbGV0aW9ucygtKQoKZGlmZiAtLWdp dCBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX3Bzci5jIGIvZHJpdmVycy9ncHUvZHJtL2k5 MTUvaW50ZWxfcHNyLmMKaW5kZXggNWFmMjJlMzUyMmY4Li5mYWRjYzI5ZTc1MTggMTAwNjQ0Ci0t LSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX3Bzci5jCisrKyBiL2RyaXZlcnMvZ3B1L2Ry bS9pOTE1L2ludGVsX3Bzci5jCkBAIC0zNDAsMTMgKzM0MCwxMiBAQCBzdGF0aWMgdm9pZCBpbnRl bF9wc3JfZW5hYmxlX3Npbmsoc3RydWN0IGludGVsX2RwICppbnRlbF9kcCkKIAlpZiAoZGV2X3By aXYtPnBzci5wc3IyX2VuYWJsZWQpIHsKIAkJZHJtX2RwX2RwY2Rfd3JpdGViKCZpbnRlbF9kcC0+ YXV4LCBEUF9SRUNFSVZFUl9BTFBNX0NPTkZJRywKIAkJCQkgICBEUF9BTFBNX0VOQUJMRSk7Ci0J CWRwY2RfdmFsIHw9IERQX1BTUl9FTkFCTEVfUFNSMjsKLQl9CisJCWRwY2RfdmFsIHw9IERQX1BT Ul9FTkFCTEVfUFNSMiB8IERQX1BTUl9JUlFfSFBEX1dJVEhfQ1JDX0VSUk9SUzsKKwl9IGVsc2Ug aWYgKElOVEVMX0dFTihkZXZfcHJpdikgPj0gOCkKKwkJZHBjZF92YWwgfD0gRFBfUFNSX0NSQ19W RVJJRklDQVRJT047CiAKIAlpZiAoZGV2X3ByaXYtPnBzci5saW5rX3N0YW5kYnkpCiAJCWRwY2Rf dmFsIHw9IERQX1BTUl9NQUlOX0xJTktfQUNUSVZFOwotCWlmICghZGV2X3ByaXYtPnBzci5wc3Iy X2VuYWJsZWQgJiYgSU5URUxfR0VOKGRldl9wcml2KSA+PSA4KQotCQlkcGNkX3ZhbCB8PSBEUF9Q U1JfQ1JDX1ZFUklGSUNBVElPTjsKIAlkcm1fZHBfZHBjZF93cml0ZWIoJmludGVsX2RwLT5hdXgs IERQX1BTUl9FTl9DRkcsIGRwY2RfdmFsKTsKIAogCWRybV9kcF9kcGNkX3dyaXRlYigmaW50ZWxf ZHAtPmF1eCwgRFBfU0VUX1BPV0VSLCBEUF9TRVRfUE9XRVJfRDApOwotLSAKMi4xOS4wCgpfX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpJbnRlbC1nZnggbWFp bGluZyBsaXN0CkludGVsLWdmeEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5m cmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9pbnRlbC1nZngK