* [PATCH] [intel-gfx] drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry.
@ 2018-10-05 18:08 Jyoti Yadav
2018-10-05 19:20 ` ✓ Fi.CI.BAT: success for drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry. (rev5) Patchwork
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Jyoti Yadav @ 2018-10-05 18:08 UTC (permalink / raw)
To: intel-gfx; +Cc: chris.p.wilson, rodrigo.vivi
DC5 and DC6 counter register tells about residency of DC5 and DC6.
Added the same in debugfs file.
v2 : Remove csr_version check.
Added generic check regarding DC counters for Gen9 onwards. (Rodrigo)
v3 : Simplified gen checks. (Chris)
v4 : Simplified "if" ladder for multiple gens.
v5 : Removed unnecessary comment.
Signed-off-by: Jyoti Yadav <jyoti.r.yadav@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index a5265c2..738f8c7 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2897,15 +2897,14 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version),
CSR_VERSION_MINOR(csr->version));
- if (IS_KABYLAKE(dev_priv) ||
- (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6))) {
+ if (IS_BROXTON(dev_priv)) {
+ seq_printf(m, "DC3 -> DC5 count: %d\n",
+ I915_READ(BXT_CSR_DC3_DC5_COUNT));
+ } else if (IS_GEN(dev_priv, 9, 11)) {
seq_printf(m, "DC3 -> DC5 count: %d\n",
I915_READ(SKL_CSR_DC3_DC5_COUNT));
seq_printf(m, "DC5 -> DC6 count: %d\n",
I915_READ(SKL_CSR_DC5_DC6_COUNT));
- } else if (IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) {
- seq_printf(m, "DC3 -> DC5 count: %d\n",
- I915_READ(BXT_CSR_DC3_DC5_COUNT));
}
out:
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread* ✓ Fi.CI.BAT: success for drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry. (rev5)
2018-10-05 18:08 [PATCH] [intel-gfx] drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry Jyoti Yadav
@ 2018-10-05 19:20 ` Patchwork
2018-10-05 20:04 ` [PATCH] [intel-gfx] drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry Ville Syrjälä
2018-10-06 1:20 ` ✓ Fi.CI.IGT: success for drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry. (rev5) Patchwork
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2018-10-05 19:20 UTC (permalink / raw)
To: Jyoti Yadav; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry. (rev5)
URL : https://patchwork.freedesktop.org/series/49800/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4941 -> Patchwork_10380 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/49800/revisions/5/mbox/
== Known issues ==
Here are the changes found in Patchwork_10380 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@amdgpu/amd_cs_nop@fork-gfx0:
fi-kbl-8809g: PASS -> DMESG-WARN (fdo#107762)
==== Possible fixes ====
igt@drv_selftest@live_coherency:
fi-gdg-551: DMESG-FAIL (fdo#107164) -> PASS
fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
fdo#107762 https://bugs.freedesktop.org/show_bug.cgi?id=107762
== Participating hosts (46 -> 40) ==
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-u2 fi-ctg-p8600
== Build changes ==
* Linux: CI_DRM_4941 -> Patchwork_10380
CI_DRM_4941: f63d55e904fffdda6bc114ca7ee2a7ff642b9e6b @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4670: 7e066794d2ea860f4199fd67549080de17b6b852 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10380: 17cca1c95637efc3d2518c7e6ede407ad0487d35 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
17cca1c95637 drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry.
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10380/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] [intel-gfx] drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry.
2018-10-05 18:08 [PATCH] [intel-gfx] drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry Jyoti Yadav
2018-10-05 19:20 ` ✓ Fi.CI.BAT: success for drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry. (rev5) Patchwork
@ 2018-10-05 20:04 ` Ville Syrjälä
2018-10-05 20:45 ` Rodrigo Vivi
2018-10-06 1:20 ` ✓ Fi.CI.IGT: success for drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry. (rev5) Patchwork
2 siblings, 1 reply; 5+ messages in thread
From: Ville Syrjälä @ 2018-10-05 20:04 UTC (permalink / raw)
To: Jyoti Yadav; +Cc: intel-gfx, chris.p.wilson, rodrigo.vivi
On Fri, Oct 05, 2018 at 02:08:46PM -0400, Jyoti Yadav wrote:
> DC5 and DC6 counter register tells about residency of DC5 and DC6.
> Added the same in debugfs file.
>
> v2 : Remove csr_version check.
> Added generic check regarding DC counters for Gen9 onwards. (Rodrigo)
> v3 : Simplified gen checks. (Chris)
> v4 : Simplified "if" ladder for multiple gens.
> v5 : Removed unnecessary comment.
>
> Signed-off-by: Jyoti Yadav <jyoti.r.yadav@intel.com>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 9 ++++-----
> 1 file changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index a5265c2..738f8c7 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2897,15 +2897,14 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
> seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version),
> CSR_VERSION_MINOR(csr->version));
>
> - if (IS_KABYLAKE(dev_priv) ||
> - (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6))) {
> + if (IS_BROXTON(dev_priv)) {
> + seq_printf(m, "DC3 -> DC5 count: %d\n",
> + I915_READ(BXT_CSR_DC3_DC5_COUNT));
> + } else if (IS_GEN(dev_priv, 9, 11)) {
What about CFL/GLK/CNL? They didn't take either branch previously.
> seq_printf(m, "DC3 -> DC5 count: %d\n",
> I915_READ(SKL_CSR_DC3_DC5_COUNT));
> seq_printf(m, "DC5 -> DC6 count: %d\n",
> I915_READ(SKL_CSR_DC5_DC6_COUNT));
> - } else if (IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) {
> - seq_printf(m, "DC3 -> DC5 count: %d\n",
> - I915_READ(BXT_CSR_DC3_DC5_COUNT));
> }
>
> out:
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] [intel-gfx] drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry.
2018-10-05 20:04 ` [PATCH] [intel-gfx] drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry Ville Syrjälä
@ 2018-10-05 20:45 ` Rodrigo Vivi
0 siblings, 0 replies; 5+ messages in thread
From: Rodrigo Vivi @ 2018-10-05 20:45 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, chris.p.wilson
On Fri, Oct 05, 2018 at 11:04:35PM +0300, Ville Syrjälä wrote:
> On Fri, Oct 05, 2018 at 02:08:46PM -0400, Jyoti Yadav wrote:
> > DC5 and DC6 counter register tells about residency of DC5 and DC6.
> > Added the same in debugfs file.
> >
> > v2 : Remove csr_version check.
> > Added generic check regarding DC counters for Gen9 onwards. (Rodrigo)
> > v3 : Simplified gen checks. (Chris)
> > v4 : Simplified "if" ladder for multiple gens.
> > v5 : Removed unnecessary comment.
> >
> > Signed-off-by: Jyoti Yadav <jyoti.r.yadav@intel.com>
> > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_debugfs.c | 9 ++++-----
> > 1 file changed, 4 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> > index a5265c2..738f8c7 100644
> > --- a/drivers/gpu/drm/i915/i915_debugfs.c
> > +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> > @@ -2897,15 +2897,14 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
> > seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version),
> > CSR_VERSION_MINOR(csr->version));
> >
> > - if (IS_KABYLAKE(dev_priv) ||
> > - (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6))) {
> > + if (IS_BROXTON(dev_priv)) {
> > + seq_printf(m, "DC3 -> DC5 count: %d\n",
> > + I915_READ(BXT_CSR_DC3_DC5_COUNT));
> > + } else if (IS_GEN(dev_priv, 9, 11)) {
>
> What about CFL/GLK/CNL? They didn't take either branch previously.
In the past we didn't have the confirmation from DMC teams
the registers were there. But we got confirmation that they
are there and other drivers use those for validation.
So this adds for all platforms. Maybe commit message could address
that better? But the patch result is right imh so I believe we
could just go ahead.
Also I understand that Jyoti is working on IGT test cases for
this in a generic way too...
>
> > seq_printf(m, "DC3 -> DC5 count: %d\n",
> > I915_READ(SKL_CSR_DC3_DC5_COUNT));
> > seq_printf(m, "DC5 -> DC6 count: %d\n",
> > I915_READ(SKL_CSR_DC5_DC6_COUNT));
> > - } else if (IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) {
> > - seq_printf(m, "DC3 -> DC5 count: %d\n",
> > - I915_READ(BXT_CSR_DC3_DC5_COUNT));
> > }
> >
> > out:
> > --
> > 1.9.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrjälä
> Intel
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry. (rev5)
2018-10-05 18:08 [PATCH] [intel-gfx] drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry Jyoti Yadav
2018-10-05 19:20 ` ✓ Fi.CI.BAT: success for drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry. (rev5) Patchwork
2018-10-05 20:04 ` [PATCH] [intel-gfx] drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry Ville Syrjälä
@ 2018-10-06 1:20 ` Patchwork
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2018-10-06 1:20 UTC (permalink / raw)
To: Jyoti Yadav; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry. (rev5)
URL : https://patchwork.freedesktop.org/series/49800/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4941_full -> Patchwork_10380_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_10380_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10380_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_10380_full:
=== IGT changes ===
==== Warnings ====
igt@perf_pmu@rc6:
shard-kbl: SKIP -> PASS
== Known issues ==
Here are the changes found in Patchwork_10380_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@gem_cpu_reloc@full:
shard-skl: NOTRUN -> INCOMPLETE (fdo#108073)
igt@gem_exec_big:
shard-hsw: PASS -> TIMEOUT (fdo#107937)
igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-f:
shard-snb: SKIP -> INCOMPLETE (fdo#105411)
igt@kms_chv_cursor_fail@pipe-a-128x128-left-edge:
shard-skl: PASS -> FAIL (fdo#104671)
igt@kms_color@pipe-b-ctm-max:
shard-apl: PASS -> FAIL (fdo#108147)
igt@kms_cursor_crc@cursor-256x85-random:
shard-apl: PASS -> FAIL (fdo#103232)
shard-glk: PASS -> FAIL (fdo#103232)
igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
shard-glk: PASS -> FAIL (fdo#104873)
igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-xtiled:
shard-skl: PASS -> FAIL (fdo#103184)
igt@kms_fbcon_fbt@fbc:
shard-skl: PASS -> FAIL (fdo#105682, fdo#103833)
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt:
shard-glk: PASS -> FAIL (fdo#103167)
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-cpu:
shard-apl: PASS -> FAIL (fdo#103167) +1
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
shard-skl: NOTRUN -> FAIL (fdo#103167)
igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt:
shard-skl: PASS -> FAIL (fdo#103167)
igt@kms_panel_fitting@legacy:
shard-skl: NOTRUN -> FAIL (fdo#105456)
{igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min}:
shard-skl: NOTRUN -> FAIL (fdo#108145) +1
{igt@kms_plane_alpha_blend@pipe-c-coverage-7efc}:
shard-skl: NOTRUN -> FAIL (fdo#108146)
igt@kms_plane_multiple@atomic-pipe-a-tiling-x:
shard-glk: PASS -> FAIL (fdo#103166)
igt@pm_rpm@universal-planes:
shard-skl: PASS -> INCOMPLETE (fdo#107807)
==== Possible fixes ====
igt@gem_exec_await@wide-contexts:
shard-glk: FAIL (fdo#106680) -> PASS
igt@kms_cursor_crc@cursor-256x256-random:
shard-glk: FAIL (fdo#103232) -> PASS +2
igt@kms_cursor_crc@cursor-256x85-sliding:
shard-apl: FAIL (fdo#103232) -> PASS +2
igt@kms_cursor_crc@cursor-64x64-suspend:
shard-apl: FAIL (fdo#103191, fdo#103232) -> PASS
igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
shard-glk: DMESG-WARN (fdo#106538, fdo#105763) -> PASS +3
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
shard-apl: FAIL (fdo#103167) -> PASS +1
igt@kms_plane@plane-position-covered-pipe-b-planes:
shard-apl: FAIL (fdo#103166) -> PASS
igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
shard-glk: FAIL (fdo#103166) -> PASS
igt@kms_setmode@basic:
shard-apl: FAIL (fdo#99912) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
fdo#103833 https://bugs.freedesktop.org/show_bug.cgi?id=103833
fdo#104671 https://bugs.freedesktop.org/show_bug.cgi?id=104671
fdo#104873 https://bugs.freedesktop.org/show_bug.cgi?id=104873
fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
fdo#105456 https://bugs.freedesktop.org/show_bug.cgi?id=105456
fdo#105682 https://bugs.freedesktop.org/show_bug.cgi?id=105682
fdo#105763 https://bugs.freedesktop.org/show_bug.cgi?id=105763
fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538
fdo#106680 https://bugs.freedesktop.org/show_bug.cgi?id=106680
fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807
fdo#107937 https://bugs.freedesktop.org/show_bug.cgi?id=107937
fdo#108073 https://bugs.freedesktop.org/show_bug.cgi?id=108073
fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145
fdo#108146 https://bugs.freedesktop.org/show_bug.cgi?id=108146
fdo#108147 https://bugs.freedesktop.org/show_bug.cgi?id=108147
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
== Participating hosts (6 -> 6) ==
No changes in participating hosts
== Build changes ==
* Linux: CI_DRM_4941 -> Patchwork_10380
CI_DRM_4941: f63d55e904fffdda6bc114ca7ee2a7ff642b9e6b @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4670: 7e066794d2ea860f4199fd67549080de17b6b852 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10380: 17cca1c95637efc3d2518c7e6ede407ad0487d35 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10380/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2018-10-06 1:20 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-10-05 18:08 [PATCH] [intel-gfx] drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry Jyoti Yadav
2018-10-05 19:20 ` ✓ Fi.CI.BAT: success for drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry. (rev5) Patchwork
2018-10-05 20:04 ` [PATCH] [intel-gfx] drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry Ville Syrjälä
2018-10-05 20:45 ` Rodrigo Vivi
2018-10-06 1:20 ` ✓ Fi.CI.IGT: success for drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry. (rev5) Patchwork
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