From mboxrd@z Thu Jan 1 00:00:00 1970 From: Manasi Navare Subject: [CI 16/19] drm/i915/dp: Configure Display stream splitter registers during DSC enable Date: Fri, 2 Nov 2018 20:49:29 -0700 Message-ID: <20181103034932.26493-16-manasi.d.navare@intel.com> References: <20181103034932.26493-1-manasi.d.navare@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id E50FB6E652 for ; Sat, 3 Nov 2018 03:47:15 +0000 (UTC) In-Reply-To: <20181103034932.26493-1-manasi.d.navare@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org RGlzcGxheSBTdHJlYW0gU3BsaXR0ZXIgcmVnaXN0ZXJzIG5lZWQgdG8gYmUgcHJvZ3JhbW1lZCB0 byBlbmFibGUKdGhlIGpvaW5lciBpZiB0d28gRFNDIGVuZ2luZXMgYXJlIHVzZWQgYW5kIGFsc28g dG8gZW5hYmxlCnRoZSBsZWZ0IGFuZCB0aGUgcmlnaHQgRFNDIGVuZ2luZXMuIFRoaXMgaGFwcGVu cyBhcyBwYXJ0IG9mCnRoZSBEU0MgZW5hYmxpbmcgcm91dGluZSBpbiB0aGUgc291cmNlIGluIGF0 b21pYyBjb21taXQuCgp2NDoKKiBSZW1vdmUgcmVkdW5kYW50IGNvbW1lbnQgKFZpbGxlKQp2MzoK KiBVc2UgY3B1X3RyYW5zY29kZXIgaW5zdGVhZCBvZiBlbmNvZGVyLT50eXBlIChWaWxsZSkKdjI6 CiogUmViYXNlIChNYW5hc2kpCgpDYzogSmFuaSBOaWt1bGEgPGphbmkubmlrdWxhQGxpbnV4Lmlu dGVsLmNvbT4KQ2M6IFZpbGxlIFN5cmphbGEgPHZpbGxlLnN5cmphbGFAbGludXguaW50ZWwuY29t PgpDYzogQW51c2hhIFNyaXZhdHNhIDxhbnVzaGEuc3JpdmF0c2FAaW50ZWwuY29tPgpTaWduZWQt b2ZmLWJ5OiBNYW5hc2kgTmF2YXJlIDxtYW5hc2kuZC5uYXZhcmVAaW50ZWwuY29tPgpSZXZpZXdl ZC1ieTogQW51c2hhIFNyaXZhdHNhIDxhbnVzaGEuc3JpdmF0c2FAaW50ZWxjb20+Ci0tLQogZHJp dmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfdmRzYy5jIHwgMjEgKysrKysrKysrKysrKysrKysrKysr CiAxIGZpbGUgY2hhbmdlZCwgMjEgaW5zZXJ0aW9ucygrKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMv Z3B1L2RybS9pOTE1L2ludGVsX3Zkc2MuYyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX3Zk c2MuYwppbmRleCA4NWFmNWY3ODRhYWQuLmZhZTUxOTM1NTFkOCAxMDA2NDQKLS0tIGEvZHJpdmVy cy9ncHUvZHJtL2k5MTUvaW50ZWxfdmRzYy5jCisrKyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2lu dGVsX3Zkc2MuYwpAQCAtMTAxMCw2ICsxMDEwLDEyIEBAIHN0YXRpYyB2b2lkIGludGVsX2RwX3dy aXRlX2RzY19wcHNfc2RwKHN0cnVjdCBpbnRlbF9lbmNvZGVyICplbmNvZGVyLAogdm9pZCBpbnRl bF9kc2NfZW5hYmxlKHN0cnVjdCBpbnRlbF9lbmNvZGVyICplbmNvZGVyLAogCQkgICAgICBjb25z dCBzdHJ1Y3QgaW50ZWxfY3J0Y19zdGF0ZSAqY3J0Y19zdGF0ZSkKIHsKKwlzdHJ1Y3QgaW50ZWxf Y3J0YyAqY3J0YyA9IHRvX2ludGVsX2NydGMoY3J0Y19zdGF0ZS0+YmFzZS5jcnRjKTsKKwlzdHJ1 Y3QgZHJtX2k5MTVfcHJpdmF0ZSAqZGV2X3ByaXYgPSB0b19pOTE1KGVuY29kZXItPmJhc2UuZGV2 KTsKKwllbnVtIHBpcGUgcGlwZSA9IGNydGMtPnBpcGU7CisJaTkxNV9yZWdfdCBkc3NfY3RsMV9y ZWcsIGRzc19jdGwyX3JlZzsKKwl1MzIgZHNzX2N0bDFfdmFsID0gMDsKKwl1MzIgZHNzX2N0bDJf dmFsID0gMDsKIAogCWlmICghY3J0Y19zdGF0ZS0+ZHNjX3BhcmFtcy5jb21wcmVzc2lvbl9lbmFi bGUpCiAJCXJldHVybjsKQEAgLTEwMTgsNSArMTAyNCwyMCBAQCB2b2lkIGludGVsX2RzY19lbmFi bGUoc3RydWN0IGludGVsX2VuY29kZXIgKmVuY29kZXIsCiAKIAlpbnRlbF9kcF93cml0ZV9kc2Nf cHBzX3NkcChlbmNvZGVyLCBjcnRjX3N0YXRlKTsKIAorCWlmIChjcnRjX3N0YXRlLT5jcHVfdHJh bnNjb2RlciA9PSBUUkFOU0NPREVSX0VEUCkgeworCQlkc3NfY3RsMV9yZWcgPSBEU1NfQ1RMMTsK KwkJZHNzX2N0bDJfcmVnID0gRFNTX0NUTDI7CisJfSBlbHNlIHsKKwkJZHNzX2N0bDFfcmVnID0g SUNMX1BJUEVfRFNTX0NUTDEocGlwZSk7CisJCWRzc19jdGwyX3JlZyA9IElDTF9QSVBFX0RTU19D VEwyKHBpcGUpOworCX0KKwlkc3NfY3RsMl92YWwgfD0gTEVGVF9CUkFOQ0hfVkRTQ19FTkFCTEU7 CisJaWYgKGNydGNfc3RhdGUtPmRzY19wYXJhbXMuZHNjX3NwbGl0KSB7CisJCWRzc19jdGwyX3Zh bCB8PSBSSUdIVF9CUkFOQ0hfVkRTQ19FTkFCTEU7CisJCWRzc19jdGwxX3ZhbCB8PSBKT0lORVJf RU5BQkxFOworCX0KKwlJOTE1X1dSSVRFKGRzc19jdGwxX3JlZywgZHNzX2N0bDFfdmFsKTsKKwlJ OTE1X1dSSVRFKGRzc19jdGwyX3JlZywgZHNzX2N0bDJfdmFsKTsKKwogCXJldHVybjsKIH0KLS0g CjIuMTguMAoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18K SW50ZWwtZ2Z4IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0 dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg==