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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
	Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Subject: Re: [PATCH 1/7] drm/i915: Avoid a full port detection in the first eDP short pulse
Date: Mon, 12 Nov 2018 19:23:58 +0200	[thread overview]
Message-ID: <20181112172358.GS9144@intel.com> (raw)
In-Reply-To: <20181109202016.18920-1-jose.souza@intel.com>

On Fri, Nov 09, 2018 at 12:20:10PM -0800, José Roberto de Souza wrote:
> Some eDP panels do not set a valid sink count value and even for the
> ones that sets is should always be one for eDP, that is why it is not
> cached in intel_edp_init_dpcd().
> 
> But intel_dp_short_pulse() compares the old count with the read one
> if there is a mistmatch a full port detection will be executed, what
> was happening in the first short pulse interruption of eDP panels
> that sets sink count.
> 
> Instead of just skip the compasison for eDP panels, lets not read
> the sink count at all for eDP.
> 
> v2: the previous version of this patch was caching the sink count
> in intel_edp_init_dpcd() but I was pointed out by Ville a patch that
> handled a case of a eDP panel that do not set sink count
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>

Yeah, I guess we concluded that never reading it is totally fine.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_dp.c | 44 +++++++++++++++++++--------------
>  1 file changed, 26 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 2b090609bee2..577c166f6483 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3936,8 +3936,6 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
>  static bool
>  intel_dp_get_dpcd(struct intel_dp *intel_dp)
>  {
> -	u8 sink_count;
> -
>  	if (!intel_dp_read_dpcd(intel_dp))
>  		return false;
>  
> @@ -3947,25 +3945,35 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
>  		intel_dp_set_common_rates(intel_dp);
>  	}
>  
> -	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_SINK_COUNT, &sink_count) <= 0)
> -		return false;
> -
>  	/*
> -	 * Sink count can change between short pulse hpd hence
> -	 * a member variable in intel_dp will track any changes
> -	 * between short pulse interrupts.
> +	 * Some eDP panels do not set a valid value for sink count, that is why
> +	 * it don't care about read it here and in intel_edp_init_dpcd().
>  	 */
> -	intel_dp->sink_count = DP_GET_SINK_COUNT(sink_count);
> +	if (!intel_dp_is_edp(intel_dp)) {
> +		u8 count;
> +		ssize_t r;
>  
> -	/*
> -	 * SINK_COUNT == 0 and DOWNSTREAM_PORT_PRESENT == 1 implies that
> -	 * a dongle is present but no display. Unless we require to know
> -	 * if a dongle is present or not, we don't need to update
> -	 * downstream port information. So, an early return here saves
> -	 * time from performing other operations which are not required.
> -	 */
> -	if (!intel_dp_is_edp(intel_dp) && !intel_dp->sink_count)
> -		return false;
> +		r = drm_dp_dpcd_readb(&intel_dp->aux, DP_SINK_COUNT, &count);
> +		if (r < 1)
> +			return false;
> +
> +		/*
> +		 * Sink count can change between short pulse hpd hence
> +		 * a member variable in intel_dp will track any changes
> +		 * between short pulse interrupts.
> +		 */
> +		intel_dp->sink_count = DP_GET_SINK_COUNT(count);
> +
> +		/*
> +		 * SINK_COUNT == 0 and DOWNSTREAM_PORT_PRESENT == 1 implies that
> +		 * a dongle is present but no display. Unless we require to know
> +		 * if a dongle is present or not, we don't need to update
> +		 * downstream port information. So, an early return here saves
> +		 * time from performing other operations which are not required.
> +		 */
> +		if (!intel_dp->sink_count)
> +			return false;
> +	}
>  
>  	if (!drm_dp_is_branch(intel_dp->dpcd))
>  		return true; /* native DP sink */
> -- 
> 2.19.1

-- 
Ville Syrjälä
Intel
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      parent reply	other threads:[~2018-11-12 17:24 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-09 20:20 [PATCH 1/7] drm/i915: Avoid a full port detection in the first eDP short pulse José Roberto de Souza
2018-11-09 20:20 ` [PATCH 2/7] drm/i915: Check PSR errors instead of retrain while PSR is enabled José Roberto de Souza
2018-11-20 22:38   ` Rodrigo Vivi
2018-11-09 20:20 ` [PATCH 3/7] drm/i915: Do not enable PSR in the next modeset after a error José Roberto de Souza
2018-11-20 22:40   ` Rodrigo Vivi
2018-11-09 20:20 ` [PATCH 4/7] drm/i915: Disable PSR when a PSR aux error happen José Roberto de Souza
2018-11-20 22:47   ` Rodrigo Vivi
2018-11-20 23:05     ` Souza, Jose
2018-11-21 21:58       ` Rodrigo Vivi
2018-11-09 20:20 ` [PATCH 5/7] drm/i915: Keep PSR disabled after a driver reload after a PSR error José Roberto de Souza
2018-11-20 22:48   ` Rodrigo Vivi
2018-11-09 20:20 ` [PATCH 6/7] drm/i915/hsw: Drop the stereo 3D enabled check in psr_compute_config() José Roberto de Souza
2018-11-20 22:50   ` Rodrigo Vivi
2018-11-09 20:20 ` [PATCH 7/7] drm/i915/psr: Disable DRRS if enabled when enabling PSR from debugfs José Roberto de Souza
2018-11-12 10:17   ` Maarten Lankhorst
2018-11-15 20:57     ` Souza, Jose
2018-12-04 21:53       ` Dhinakaran Pandiyan
2018-12-11 22:02     ` Dhinakaran Pandiyan
2018-12-12 13:02       ` Souza, Jose
2018-12-13  1:11         ` Dhinakaran Pandiyan
2018-12-13 14:43           ` Souza, Jose
2018-11-09 20:38 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: Avoid a full port detection in the first eDP short pulse Patchwork
2018-11-09 20:41 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-11-09 21:02 ` ✗ Fi.CI.BAT: failure " Patchwork
2018-11-12 17:23 ` Ville Syrjälä [this message]

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