From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>,
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 5/9] drm: Add offset of PSR2 SU X granularity value
Date: Thu, 29 Nov 2018 14:16:23 -0800 [thread overview]
Message-ID: <20181129221623.GQ8630@intel.com> (raw)
In-Reply-To: <20181127003710.18618-5-jose.souza@intel.com>
On Mon, Nov 26, 2018 at 04:37:06PM -0800, José Roberto de Souza wrote:
> Source is required to comply to sink SU granularity when
> DP_PSR2_SU_GRANULARITY_REQUIRED is set in DP_PSR_CAPS,
> so adding the register here.
>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> include/drm/drm_dp_helper.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index db516c48cda3..acc7ccfd2044 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -314,6 +314,9 @@
> # define DP_PSR_SETUP_TIME_SHIFT 1
> # define DP_PSR2_SU_Y_COORDINATE_REQUIRED (1 << 4) /* eDP 1.4a */
> # define DP_PSR2_SU_GRANULARITY_REQUIRED (1 << 5) /* eDP 1.4b */
> +
> +#define DP_PSR2_SU_X_GRANULARITY 0x072 /* eDP 1.4b */
> +
> /*
> * 0x80-0x8f describe downstream port capabilities, but there are two layouts
> * based on whether DP_DETAILED_CAP_INFO_AVAILABLE was set. If it was not,
> --
> 2.19.2
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2018-11-29 22:16 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-27 0:37 [PATCH 1/9] drm/i915: Disable PSR in Apple panels José Roberto de Souza
2018-11-27 0:37 ` [PATCH 2/9] drm/i915/psr: Don't tell sink that main link will be active while is active PSR2 José Roberto de Souza
2018-11-28 19:02 ` Rodrigo Vivi
2018-11-28 20:13 ` Souza, Jose
2018-11-30 1:09 ` Rodrigo Vivi
2018-11-27 0:37 ` [PATCH 3/9] drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch José Roberto de Souza
2018-11-29 22:04 ` Rodrigo Vivi
2018-11-29 23:37 ` Dhinakaran Pandiyan
2018-11-27 0:37 ` [PATCH 4/9] drm/i915/icl: Do not change reserved registers related to PSR2 José Roberto de Souza
2018-11-29 22:15 ` Rodrigo Vivi
2018-11-29 23:46 ` Souza, Jose
2018-11-30 21:21 ` Runyan, Arthur J
2018-11-27 0:37 ` [PATCH 5/9] drm: Add offset of PSR2 SU X granularity value José Roberto de Souza
2018-11-29 22:16 ` Rodrigo Vivi [this message]
2018-11-27 0:37 ` [PATCH 6/9] drm/i915/psr: Check if source supports sink specific SU granularity José Roberto de Souza
2018-11-29 23:03 ` Rodrigo Vivi
2018-11-30 0:00 ` Souza, Jose
2018-11-27 0:37 ` [PATCH 7/9] drm/i915/psr: Rename PSR2 macros to better match meaning José Roberto de Souza
2018-11-29 23:07 ` Rodrigo Vivi
2018-11-29 23:25 ` Dhinakaran Pandiyan
2018-11-30 0:17 ` Souza, Jose
2018-11-27 0:37 ` [PATCH 8/9] drm/i915/psr: Set the right frames values José Roberto de Souza
2018-11-29 23:10 ` Rodrigo Vivi
2018-11-30 0:48 ` Souza, Jose
2018-11-29 23:33 ` Dhinakaran Pandiyan
2018-11-30 1:00 ` Souza, Jose
2018-11-30 19:35 ` Dhinakaran Pandiyan
2018-11-30 21:18 ` Souza, Jose
2018-11-30 22:02 ` Dhinakaran Pandiyan
2018-11-27 0:37 ` [PATCH 9/9] drm/i915: Remove old PSR2 FIXME about frontbuffer tracking José Roberto de Souza
2018-11-29 23:11 ` Rodrigo Vivi
2018-11-29 23:26 ` Dhinakaran Pandiyan
2018-11-27 0:53 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/9] drm/i915: Disable PSR in Apple panels Patchwork
2018-11-27 0:57 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-11-27 1:16 ` ✗ Fi.CI.BAT: failure " Patchwork
2018-11-27 7:05 ` Saarinen, Jani
2018-11-27 13:38 ` [PATCH 1/9] " Ville Syrjälä
2018-11-27 21:55 ` Souza, Jose
2018-11-29 23:44 ` Dhinakaran Pandiyan
2018-11-27 14:11 ` kbuild test robot
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20181129221623.GQ8630@intel.com \
--to=rodrigo.vivi@intel.com \
--cc=dhinakaran.pandiyan@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jose.souza@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).