[RFC PATCH 01/42] drm/i915: support 1G pages for the 48b PPGTT

Matthew Auld
2019-02-14T14:57:43Z

Support inserting 1G gtt pages into the 48b PPGTT.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 4 ++++
drivers/gpu/drm/i915/i915_gem_gtt.c | 16 +++++++++++++---
drivers/gpu/drm/i915/i915_gem_gtt.h | 4 +++-
drivers/gpu/drm/i915/selftests/huge_pages.c | 3 ++-
4 files changed, 22 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 2aeea977283f..fed46fe19c03 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -118,10 +118,14 @@ stringify_page_sizes(unsigned int page_sizes, char *buf, size_t len)
return "64K";
case I915_GTT_PAGE_SIZE_2M:
return "2M";
+ case I915_GTT_PAGE_SIZE_1G:
+ return "1G";
default:
if (!buf)
return "M";

+ if (page_sizes & I915_GTT_PAGE_SIZE_1G)
+ x += snprintf(buf + x, len - x, "1G, ");
if (page_sizes & I915_GTT_PAGE_SIZE_2M)
x += snprintf(buf + x, len - x, "2M, ");
if (page_sizes & I915_GTT_PAGE_SIZE_64K)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index d646d37eec2f..de67a2f1ccfe 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1069,9 +1069,19 @@ static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
gen8_pte_t *vaddr;
u16 index, max;

- if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_2M &&
- IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_2M) &&
- rem >= I915_GTT_PAGE_SIZE_2M && !idx.pte) {
+ if (unlikely(vma->page_sizes.sg & I915_GTT_PAGE_SIZE_1G) &&
+ IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_1G) &&
+ rem >= I915_GTT_PAGE_SIZE_1G && !(idx.pte | idx.pde)) {
+ index = idx.pdpe;
+ max = GEN8_PML4ES_PER_PML4;
+ page_size = I915_GTT_PAGE_SIZE_1G;
+
+ encode |= GEN8_PDPE_PS_1G;
+
+ vaddr = kmap_atomic_px(pdp);
+ } else if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_2M &&
+ IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_2M) &&
+ rem >= I915_GTT_PAGE_SIZE_2M && !idx.pte) {
index = idx.pde;
max = I915_PDES;
page_size = I915_GTT_PAGE_SIZE_2M;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 03ade71b8d9a..9a8066779f47 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -46,9 +46,10 @@
#define I915_GTT_PAGE_SIZE_4K BIT_ULL(12)
#define I915_GTT_PAGE_SIZE_64K BIT_ULL(16)
#define I915_GTT_PAGE_SIZE_2M BIT_ULL(21)
+#define I915_GTT_PAGE_SIZE_1G BIT_ULL(30)

#define I915_GTT_PAGE_SIZE I915_GTT_PAGE_SIZE_4K
-#define I915_GTT_MAX_PAGE_SIZE I915_GTT_PAGE_SIZE_2M
+#define I915_GTT_MAX_PAGE_SIZE I915_GTT_PAGE_SIZE_1G

#define I915_GTT_PAGE_MASK -I915_GTT_PAGE_SIZE

@@ -160,6 +161,7 @@ typedef u64 gen8_ppgtt_pml4e_t;

#define GEN8_PDE_IPS_64K BIT(11)
#define GEN8_PDE_PS_2M BIT(7)
+#define GEN8_PDPE_PS_1G BIT(7)

struct sg_table;

diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c b/drivers/gpu/drm/i915/selftests/huge_pages.c
index a9a2fa35876f..b6d84939592b 100644
--- a/drivers/gpu/drm/i915/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
@@ -30,6 +30,7 @@
#include "i915_random.h"

static const unsigned int page_sizes[] = {
+ I915_GTT_PAGE_SIZE_1G,
I915_GTT_PAGE_SIZE_2M,
I915_GTT_PAGE_SIZE_64K,
I915_GTT_PAGE_SIZE_4K,
@@ -1220,7 +1221,7 @@ static int igt_ppgtt_exhaust_huge(void *arg)
*/

n = 0;
- for_each_set_bit(i, &supported, ilog2(I915_GTT_MAX_PAGE_SIZE) + 1)
+ for_each_set_bit(i, &supported, ilog2(I915_GTT_PAGE_SIZE_2M) + 1)
pages[n++] = BIT(i);

for (size_mask = 2; size_mask < BIT(n); size_mask++) {
--
2.20.1