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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v4 8/8] drm/i915: Bump gen7+ fb size limits to 16kx16k
Date: Mon, 20 May 2019 18:14:09 +0300	[thread overview]
Message-ID: <20190520151409.GX24299@intel.com> (raw)
In-Reply-To: <c65b5eb7-cd06-95f3-426b-726a50f74cda@linux.intel.com>

On Thu, May 16, 2019 at 06:33:21PM +0200, Maarten Lankhorst wrote:
> Op 09-05-2019 om 14:21 schreef Ville Syrjala:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > With gtt remapping in place we can use arbitrarily large
> > framebuffers. Let's bump the limits to 16kx16k on gen7+.
> > The limit was chosen to match the maximum 2D surface size
> > of the 3D engine.
> >
> > With the remapping we could easily go higher than that for the
> > display engine. However the modesetting ddx will blindly assume
> > it can handle whatever is reported via kms. The oversized
> > buffer dimensions are not caught by glamor nor Mesa until
> > finally an assert will trip when genxml attempts to pack the
> > SURFACE_STATE. So we pick a safe limit to avoid the X server
> > from crashing (or potentially misbehaving if the genxml asserts
> > are compiled out).
> >
> > Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110187
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 18 ++++++++++++------
> >  1 file changed, 12 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index a2e4ef938d53..a495fd2dcaa3 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -15783,16 +15783,22 @@ int intel_modeset_init(struct drm_device *dev)
> >  		}
> >  	}
> >  
> > -	/* maximum framebuffer dimensions */
> > -	if (IS_GEN(dev_priv, 2)) {
> > -		dev->mode_config.max_width = 2048;
> > -		dev->mode_config.max_height = 2048;
> > +	/*
> > +	 * Maximum framebuffer dimensions, chosen to match
> > +	 * the maximum render engine surface size on gen4+.
> > +	 */
> > +	if (INTEL_GEN(dev_priv) >= 7) {
> > +		dev->mode_config.max_width = 16384;
> > +		dev->mode_config.max_height = 16384;
> > +	} else if (INTEL_GEN(dev_priv) >= 4) {
> > +		dev->mode_config.max_width = 8192;
> > +		dev->mode_config.max_height = 8192;
> >  	} else if (IS_GEN(dev_priv, 3)) {
> >  		dev->mode_config.max_width = 4096;
> >  		dev->mode_config.max_height = 4096;
> >  	} else {
> > -		dev->mode_config.max_width = 8192;
> > -		dev->mode_config.max_height = 8192;
> > +		dev->mode_config.max_width = 2048;
> > +		dev->mode_config.max_height = 2048;
> >  	}
> >  
> >  	if (IS_I845G(dev_priv) || IS_I865G(dev_priv)) {
> 
> Should be good enough, lets not go too crazy. :)
> 
> For whole series:
> 
> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

Yay! Everything rb'd so series pushed to dinq.

Thanks for the reviews everyone.

-- 
Ville Syrjälä
Intel
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  reply	other threads:[~2019-05-20 15:14 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-09 12:21 [PATCH v4 0/8] drm/i915: GTT remapping for display Ville Syrjala
2019-05-09 12:21 ` [PATCH v4 1/8] drm/i915: Add a new "remapped" gtt_view Ville Syrjala
2019-05-09 12:21 ` [PATCH v4 2/8] drm/i915/selftests: Add mock selftest for remapped vmas Ville Syrjala
2019-05-09 12:21 ` [PATCH v4 3/8] drm/i915/selftests: Add live vma selftest Ville Syrjala
2019-05-09 12:21 ` [PATCH v4 4/8] drm/i915: Shuffle stride checking code around Ville Syrjala
2019-05-10  8:37   ` Daniel Vetter
2019-05-09 12:21 ` [PATCH v4 5/8] drm/i915: Overcome display engine stride limits via GTT remapping Ville Syrjala
2019-05-09 12:21 ` [PATCH v4 6/8] drm/i915: Align dumb buffer stride to 4k to allow for gtt remapping Ville Syrjala
2019-05-10  8:40   ` Daniel Vetter
2019-05-09 12:21 ` [PATCH v4 7/8] drm/i915: Bump fb stride limit to 128KiB for gen4+ and 256KiB for gen7+ Ville Syrjala
2019-05-09 12:21 ` [PATCH v4 8/8] drm/i915: Bump gen7+ fb size limits to 16kx16k Ville Syrjala
2019-05-16 16:33   ` Maarten Lankhorst
2019-05-20 15:14     ` Ville Syrjälä [this message]
2019-05-09 14:54 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: GTT remapping for display Patchwork
2019-05-09 14:58 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-05-09 15:14 ` ✓ Fi.CI.BAT: success " Patchwork
2019-05-09 23:36 ` ✓ Fi.CI.IGT: " Patchwork

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