From mboxrd@z Thu Jan 1 00:00:00 1970 From: Zhenyu Wang Subject: [PULL] gvt-fixes Date: Wed, 29 May 2019 17:06:08 +0800 Message-ID: <20190529090608.GB3211@zhen-hp.sh.intel.com> Reply-To: Zhenyu Wang Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2021904109==" Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Joonas Lahtinen , "Vivi, Rodrigo" , Jani Nikula Cc: intel-gfx , intel-gvt-dev , "Lv, Zhiyuan" , "Yuan, Hang" List-Id: intel-gfx@lists.freedesktop.org --===============2021904109== Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="NMuMz9nt05w80d4+" Content-Disposition: inline --NMuMz9nt05w80d4+ Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi, Here's more gvt fixes for 5.2. This includes fixes for recently seen arbitrary DMA map fault with sane gtt entry initialization, and several enforcement fixes for e.g ggtt range validation, some mode register handler and one cmd length fix for parser. Thanks -- The following changes since commit 591c39ffac4ab1ddf2ea6d49331cb614e0682b28: drm/i915/gvt: Fix an error code in ppgtt_populate_spt_by_guest_entry() (2= 019-05-21 10:58:16 +0800) are available in the Git repository at: https://github.com/intel/gvt-linux tags/gvt-fixes-2019-05-29 for you to fetch changes up to 66b5cfa043e44eb15bcfd6488db7664ce7b3ac80: drm/i915/gvt: Fix cmd length of VEB_DI_IECP (2019-05-28 17:53:45 +0800) ---------------------------------------------------------------- gvt-fixes-2019-05-29 - Fix gtt entry update with sane initialization (Tina) - Fix missed RING_HEAD/RING_TAIL update for vgpu state (Xiaolin) - Fix force-to-nonpriv warning from recent guest (Colin) - Fix GFX_MODE and CSFE_CHICKEN1_REG handler for host only control (Colin) - GGTT range validation enforced (Xiong) - Fix cmd length for VEB_DI_IECP (Fred) ---------------------------------------------------------------- Colin Xu (3): drm/i915/gvt: Update force-to-nonpriv register whitelist drm/i915/gvt: Fix GFX_MODE handling drm/i915/gvt: Fix vGPU CSFE_CHICKEN1_REG mmio handler Gao, Fred (1): drm/i915/gvt: Fix cmd length of VEB_DI_IECP Tina Zhang (1): drm/i915/gvt: Initialize intel_gvt_gtt_entry in stack Xiaolin Zhang (1): drm/i915/gvt: save RING_HEAD into vreg when vgpu switched out Xiong Zhang (1): drm/i915/gvt: refine ggtt range validation drivers/gpu/drm/i915/gvt/cmd_parser.c | 2 +- drivers/gpu/drm/i915/gvt/gtt.c | 26 ++++++++++++++++--------- drivers/gpu/drm/i915/gvt/handlers.c | 36 +++++++++++++++++++++++++++++++= +++- drivers/gpu/drm/i915/gvt/scheduler.c | 4 ++++ 4 files changed, 57 insertions(+), 11 deletions(-) --=20 Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 --NMuMz9nt05w80d4+ Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iF0EARECAB0WIQTXuabgHDW6LPt9CICxBBozTXgYJwUCXO5LgAAKCRCxBBozTXgY J2V/AKCRUyb9vKkbEjuLKpcPufI23HVDSgCgh+xgnnLaVjUVDI/L4Y3+NKmlaIk= =W4zV -----END PGP SIGNATURE----- --NMuMz9nt05w80d4+-- --===============2021904109== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4 IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4 --===============2021904109==--