[RFC 18/31] drm/i915: Make ggtt invalidation work on ggtt

Tvrtko Ursulin
2019-06-14T15:18:06Z

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

It is more logical for ggtt invalidation to take ggtt as input parameter.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 51 ++++++++++++++---------------
drivers/gpu/drm/i915/i915_gem_gtt.h | 2 +-
2 files changed, 26 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 2232bd56e912..95af45156cc2 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -111,9 +111,9 @@
static int
i915_get_ggtt_vma_pages(struct i915_vma *vma);

-static void gen6_ggtt_invalidate(struct drm_i915_private *i915)
+static void gen6_ggtt_invalidate(struct i915_ggtt *ggtt)
{
- struct intel_uncore *uncore = &i915->uncore;
+ struct intel_uncore *uncore = &ggtt->vm.i915->uncore;

/*
* Note that as an uncached mmio write, this will flush the
@@ -122,24 +122,19 @@ static void gen6_ggtt_invalidate(struct drm_i915_private *i915)
intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
}

-static void guc_ggtt_invalidate(struct drm_i915_private *i915)
+static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
{
- struct intel_uncore *uncore = &i915->uncore;
+ struct intel_uncore *uncore = &ggtt->vm.i915->uncore;

- gen6_ggtt_invalidate(i915);
+ gen6_ggtt_invalidate(ggtt);
intel_uncore_write_fw(uncore, GEN8_GTCR, GEN8_GTCR_INVALIDATE);
}

-static void gmch_ggtt_invalidate(struct drm_i915_private *i915)
+static void gmch_ggtt_invalidate(struct i915_ggtt *ggtt)
{
intel_gtt_chipset_flush();
}

-static inline void i915_ggtt_invalidate(struct drm_i915_private *i915)
-{
- i915->ggtt.invalidate(i915);
-}
-
static int ppgtt_bind_vma(struct i915_vma *vma,
enum i915_cache_level cache_level,
u32 unused)
@@ -1876,7 +1871,7 @@ static int gen6_alloc_va_range(struct i915_address_space *vm,

if (flush) {
mark_tlbs_dirty(&ppgtt->base);
- gen6_ggtt_invalidate(vm->i915);
+ gen6_ggtt_invalidate(&vm->i915->ggtt);
}

intel_runtime_pm_put(vm->i915, wakeref);
@@ -2025,7 +2020,7 @@ static int pd_vma_bind(struct i915_vma *vma,
gen6_write_pde(ppgtt, pde, pt);

mark_tlbs_dirty(&ppgtt->base);
- gen6_ggtt_invalidate(ppgtt->base.vm.i915);
+ gen6_ggtt_invalidate(ggtt);

return 0;
}
@@ -2340,7 +2335,7 @@ void i915_gem_suspend_gtt_mappings(struct drm_i915_private *dev_priv)

ggtt->vm.clear_range(&ggtt->vm, 0, ggtt->vm.total);

- i915_ggtt_invalidate(dev_priv);
+ ggtt->invalidate(ggtt);
}

int i915_gem_gtt_prepare_pages(struct drm_i915_gem_object *obj,
@@ -2386,7 +2381,7 @@ static void gen8_ggtt_insert_page(struct i915_address_space *vm,

gen8_set_pte(pte, gen8_pte_encode(addr, level, 0));

- ggtt->invalidate(vm->i915);
+ ggtt->invalidate(ggtt);
}

static void gen8_ggtt_insert_entries(struct i915_address_space *vm,
@@ -2414,7 +2409,7 @@ static void gen8_ggtt_insert_entries(struct i915_address_space *vm,
* We want to flush the TLBs only after we're certain all the PTE
* updates have finished.
*/
- ggtt->invalidate(vm->i915);
+ ggtt->invalidate(ggtt);
}

static void gen6_ggtt_insert_page(struct i915_address_space *vm,
@@ -2429,7 +2424,7 @@ static void gen6_ggtt_insert_page(struct i915_address_space *vm,

iowrite32(vm->pte_encode(addr, level, flags), pte);

- ggtt->invalidate(vm->i915);
+ ggtt->invalidate(ggtt);
}

/*
@@ -2455,7 +2450,7 @@ static void gen6_ggtt_insert_entries(struct i915_address_space *vm,
* We want to flush the TLBs only after we're certain all the PTE
* updates have finished.
*/
- ggtt->invalidate(vm->i915);
+ ggtt->invalidate(ggtt);
}

static void nop_clear_range(struct i915_address_space *vm,
@@ -3650,25 +3645,29 @@ int i915_ggtt_enable_hw(struct drm_i915_private *dev_priv)

void i915_ggtt_enable_guc(struct drm_i915_private *i915)
{
- GEM_BUG_ON(i915->ggtt.invalidate != gen6_ggtt_invalidate);
+ struct i915_ggtt *ggtt = &i915->ggtt;

- i915->ggtt.invalidate = guc_ggtt_invalidate;
+ GEM_BUG_ON(ggtt->invalidate != gen6_ggtt_invalidate);

- i915_ggtt_invalidate(i915);
+ ggtt->invalidate = guc_ggtt_invalidate;
+
+ ggtt->invalidate(ggtt);
}

void i915_ggtt_disable_guc(struct drm_i915_private *i915)
{
+ struct i915_ggtt *ggtt = &i915->ggtt;
+
/* XXX Temporary pardon for error unload */
- if (i915->ggtt.invalidate == gen6_ggtt_invalidate)
+ if (ggtt->invalidate == gen6_ggtt_invalidate)
return;

/* We should only be called after i915_ggtt_enable_guc() */
- GEM_BUG_ON(i915->ggtt.invalidate != guc_ggtt_invalidate);
+ GEM_BUG_ON(ggtt->invalidate != guc_ggtt_invalidate);

- i915->ggtt.invalidate = gen6_ggtt_invalidate;
+ ggtt->invalidate = gen6_ggtt_invalidate;

- i915_ggtt_invalidate(i915);
+ ggtt->invalidate(ggtt);
}

void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
@@ -3710,7 +3709,7 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
}

ggtt->vm.closed = false;
- i915_ggtt_invalidate(dev_priv);
+ ggtt->invalidate(ggtt);

mutex_unlock(&ggtt->vm.mutex);

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index f8c06288be65..b541190db6e8 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -401,7 +401,7 @@ struct i915_ggtt {

/** "Graphics Stolen Memory" holds the global PTEs */
void __iomem *gsm;
- void (*invalidate)(struct drm_i915_private *dev_priv);
+ void (*invalidate)(struct i915_ggtt *ggtt);

bool do_idle_maps;

--
2.20.1