Re: [PATCH v2 32/40] drm/i915/tgl: Updated Private PAT programming

Chris Wilson
2019-08-20T10:33:51Z

Quoting Lucas De Marchi (2019-08-17 10:38:54)
> From: Michel Thierry <michel.thierry@intel.com>
>
> Gen12 removes the target-cache and age fields from the private PAT
> because MOCS now have the capability to set these itself. Only memory-type
> field should be programmed in the ppat, the reminded bits are reserved.
>
> Since now there are only 4 possible combinations, we could set only 4
> PPAT and leave the reminded 4 as UC, but I left them as WB as we used
> to have before.
>
> Also these registers have been relocated to the 0x4800-0x481c range.
>
> HSDES: 1406402661
> BSpec: 31654
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris