✗ Fi.CI.CHECKPATCH: warning for Tiger Lake batch 3 (rev2)

Patchwork
2019-08-17T09:49:08Z

== Series Details ==

Series: Tiger Lake batch 3 (rev2)
URL : https://patchwork.freedesktop.org/series/65290/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
bfd5dba4649b drm/i915/tgl: disable DDIC
90d92ce242b9 drm/i915/tgl: add support for reading the timestamp frequency
bc67233266e2 drm/i915/tgl: Move transcoders to pipes' powerwells
6d8b64b06ed0 drm/i915/tgl: update DMC firmware to 2.04
c7f6f41671dc drm/i915/psr: Make PSR registers relative to transcoders
-:428: WARNING:LONG_LINE_COMMENT: line over 100 characters
#428: FILE: drivers/gpu/drm/i915/i915_reg.h:4246:
+#define EDP_PSR_AUX_DATA(tran, i) _MMIO(_PSR_ADJ(tran, _SRD_AUX_DATA_A) + (i) + 4) /* 5 registers */

total: 0 errors, 1 warnings, 0 checks, 393 lines checked
66b0f8d14a5c drm/i915: Add transcoder restriction to PSR2
-:13: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#13:
Since BDW PSR is allowed on any port, but we need to restrict by transcoder.

total: 0 errors, 1 warnings, 0 checks, 28 lines checked
ea93386d65d2 drm/i915: Do not unmask PSR interruption in IRQ postinstall
3647639077cd drm/i915/psr: Only handle interruptions of the transcoder in use
-:230: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'trans' - possible side-effects?
#230: FILE: drivers/gpu/drm/i915/i915_reg.h:4227:
+#define _EDP_PSR_TRANS_SHIFT(trans) ((trans) == TRANSCODER_EDP ? \
+ 0 : ((trans) + 1) * 8)

total: 0 errors, 0 warnings, 1 checks, 204 lines checked
1470888c4e04 drm/i915/bdw+: Enable PSR in any eDP port
d2a1e84537f6 drm/i915: Guard and warn if more than one eDP panel is present
03270e92e574 drm/i915: Do not read PSR2 register in transcoders without PSR2
b9911dff9e65 drm/i915/tgl: PSR link standby is not supported anymore
0d7f5c32f219 drm/i915/tgl: Access the right register when handling PSR interruptions
06803b514364 drm/i915/tgl: Add maximum resolution supported by PSR2 HW
b20288b02d29 drm/i915: Fix DP-MST crtc_mask
8a0acb1f6f18 drm/i915: Add for_each_new_intel_connector_in_state()
-:22: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#22: FILE: drivers/gpu/drm/i915/display/intel_display.h:414:
+#define for_each_new_intel_connector_in_state(__state, connector, new_connector_state, __i) \
+ for ((__i) = 0; \
+ (__i) < (__state)->base.num_connector; \
+ (__i)++) \
+ for_each_if ((__state)->base.connectors[__i].ptr && \
+ ((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \
+ (new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1))

-:22: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible side-effects?
#22: FILE: drivers/gpu/drm/i915/display/intel_display.h:414:
+#define for_each_new_intel_connector_in_state(__state, connector, new_connector_state, __i) \
+ for ((__i) = 0; \
+ (__i) < (__state)->base.num_connector; \
+ (__i)++) \
+ for_each_if ((__state)->base.connectors[__i].ptr && \
+ ((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \
+ (new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1))

-:22: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects?
#22: FILE: drivers/gpu/drm/i915/display/intel_display.h:414:
+#define for_each_new_intel_connector_in_state(__state, connector, new_connector_state, __i) \
+ for ((__i) = 0; \
+ (__i) < (__state)->base.num_connector; \
+ (__i)++) \
+ for_each_if ((__state)->base.connectors[__i].ptr && \
+ ((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \
+ (new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1))

-:26: WARNING:SPACING: space prohibited between function name and open parenthesis '('
#26: FILE: drivers/gpu/drm/i915/display/intel_display.h:418:
+ for_each_if ((__state)->base.connectors[__i].ptr && \

-:27: WARNING:LONG_LINE: line over 100 characters
#27: FILE: drivers/gpu/drm/i915/display/intel_display.h:419:
+ ((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \

-:28: WARNING:LONG_LINE: line over 100 characters
#28: FILE: drivers/gpu/drm/i915/display/intel_display.h:420:
+ (new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1))

total: 1 errors, 3 warnings, 2 checks, 14 lines checked
c29f6126d5bc drm: Add for_each_oldnew_intel_crtc_in_state_reverse()
-:27: WARNING:LONG_LINE: line over 100 characters
#27: FILE: drivers/gpu/drm/i915/display/intel_display.h:422:
+#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \

-:27: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible side-effects?
#27: FILE: drivers/gpu/drm/i915/display/intel_display.h:422:
+#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \
+ for ((__i) = (__state)->base.dev->mode_config.num_crtc - 1; \
+ (__i) >= 0 && \
+ ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \
+ (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), \
+ (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
+ (__i)--) \
+ for_each_if(crtc)

-:27: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'crtc' - possible side-effects?
#27: FILE: drivers/gpu/drm/i915/display/intel_display.h:422:
+#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \
+ for ((__i) = (__state)->base.dev->mode_config.num_crtc - 1; \
+ (__i) >= 0 && \
+ ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \
+ (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), \
+ (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
+ (__i)--) \
+ for_each_if(crtc)

-:27: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects?
#27: FILE: drivers/gpu/drm/i915/display/intel_display.h:422:
+#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \
+ for ((__i) = (__state)->base.dev->mode_config.num_crtc - 1; \
+ (__i) >= 0 && \
+ ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \
+ (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), \
+ (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
+ (__i)--) \
+ for_each_if(crtc)

total: 0 errors, 1 warnings, 3 checks, 15 lines checked
e5990121b4b6 drm/i915: Disable pipes in reverse order
08b6786f83a9 drm/i915/tgl: Select master transcoder in DP MST
6a6b80f2fb18 drm/i915/tgl: Introduce initial Tiger Lake workarounds
c77dbff20a84 drm/i915/tgl: Enable VD HCP/MFX sub-pipe power gating
6cdda9b265af drm/i915/tgl: Do not apply WaIncreaseDefaultTLBEntries from GEN12 onwards
94baf2b17b36 drm/i915/tgl: Register state context definition for Gen12
df4c77de5dd1 drm/i915/tgl: move DP_TP_* to transcoder
d0ca1f27b4a0 drm/i915/tgl: Implement TGL DisplayPort training sequence
86de648919da HACK: drm/i915/tgl: Gen12 render context size
bfbb493106a1 drm/i915/tgl: add Gen12 default indirect ctx offset
bde4c00b75c9 drm/i915/tgl: add GEN12_MAX_CONTEXT_HW_ID
5453b392d597 drm/i915/tgl: Gen12 csb support
230eba25e017 drm/i915/tgl: Report valid VDBoxes with SFC capability
623edef0032b rm/i915/tgl: Move GTCR register to cope with GAM MMIO address remap
240a129f0132 drm/i915/tgl: Updated Private PAT programming
ea7621575fd9 drm/i915/tgl/perf: use the same oa ctx_id format as icl
493819143bc7 drm/i915/perf: add a parameter to control the size of OA buffer
6614f3d1a6f2 drm/i915/tgl: Add perf support on TGL
-:546: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#546:
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 610 lines checked
722ded5b9285 drm/i915/tgl: Gen-12 display loses Yf tiling and legacy CCS support
ed7414e63958 drm/framebuffer/tgl: Format modifier for Intel Gen-12 render compression
4d432593e93d drm/i915/tgl: Gen-12 render decompression
523159de2114 drm/framebuffer/tgl: Format modifier for Intel Gen-12 media compression
32fc1d4b22a3 drm/i915/tgl: Gen-12 media compression
-:74: WARNING:MISSING_BREAK: Possible switch case/default not preceded by break or fallthrough comment
#74: FILE: drivers/gpu/drm/i915/display/intel_display.c:2523:
+ case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:

total: 0 errors, 1 warnings, 0 checks, 134 lines checked