[PATCH v2 00/40] Tiger Lake batch 3

Lucas De Marchi
2019-08-17T09:39:12Z

v2 of https://patchwork.freedesktop.org/series/65290/

Differences from previous version:
- Update patches that were already made available to their latest
versions
- Remove non-working W/A
- Clean a little bit the PSR commits
- Run checkpatch and fix warning
- Add patch to update DMC so we don't keep getting flip_done timeout
- Add hack to change powerwell that backs transcoders C and D.
- Dropped nacked patch and replace with "drm/i915: Fix DP-MST crtc_mask".

Most of the pathes here can be reviewed as is, but we may need to split
the changes later for authors to take over on fixing commits.
There are some that are obviously not the final version. You can ignore
them but CI needs them to run successfully.

Daniele Ceraolo Spurio (4):
HACK: drm/i915/tgl: Gen12 render context size
drm/i915/tgl: add Gen12 default indirect ctx offset
drm/i915/tgl: add GEN12_MAX_CONTEXT_HW_ID
drm/i915/tgl: Gen12 csb support

Dhinakaran Pandiyan (5):
drm/i915/tgl: Gen-12 display loses Yf tiling and legacy CCS support
drm/framebuffer/tgl: Format modifier for Intel Gen-12 render
compression
drm/i915/tgl: Gen-12 render decompression
drm/framebuffer/tgl: Format modifier for Intel Gen-12 media
compression
drm/i915/tgl: Gen-12 media compression

José Roberto de Souza (16):
drm/i915/tgl: Move transcoders to pipes' powerwells
drm/i915/psr: Make PSR registers relative to transcoders
drm/i915: Add transcoder restriction to PSR2
drm/i915: Do not unmask PSR interruption in IRQ postinstall
drm/i915/psr: Only handle interruptions of the transcoder in use
drm/i915/bdw+: Enable PSR in any eDP port
drm/i915: Guard and warn if more than one eDP panel is present
drm/i915: Do not read PSR2 register in transcoders without PSR2
drm/i915/tgl: PSR link standby is not supported anymore
drm/i915/tgl: Access the right register when handling PSR
interruptions
drm/i915/tgl: Add maximum resolution supported by PSR2 HW
drm/i915: Add for_each_new_intel_connector_in_state()
drm: Add for_each_oldnew_intel_crtc_in_state_reverse()
drm/i915: Disable pipes in reverse order
drm/i915/tgl: Select master transcoder in DP MST
drm/i915/tgl: Implement TGL DisplayPort training sequence

Lionel Landwerlin (2):
drm/i915/perf: add a parameter to control the size of OA buffer
drm/i915/tgl: Add perf support on TGL

Lucas De Marchi (4):
drm/i915/tgl: disable DDIC
drm/i915/tgl: update DMC firmware to 2.04
drm/i915/tgl: Introduce initial Tiger Lake workarounds
drm/i915/tgl: move DP_TP_* to transcoder

Michel Thierry (8):
drm/i915/tgl: add support for reading the timestamp frequency
drm/i915/tgl: Enable VD HCP/MFX sub-pipe power gating
drm/i915/tgl: Do not apply WaIncreaseDefaultTLBEntries from GEN12
onwards
drm/i915/tgl: Register state context definition for Gen12
drm/i915/tgl: Report valid VDBoxes with SFC capability
rm/i915/tgl: Move GTCR register to cope with GAM MMIO address remap
drm/i915/tgl: Updated Private PAT programming
drm/i915/tgl/perf: use the same oa ctx_id format as icl

Ville Syrjälä (1):
drm/i915: Fix DP-MST crtc_mask

drivers/gpu/drm/i915/Makefile | 3 +-
drivers/gpu/drm/i915/display/intel_crt.c | 2 +
drivers/gpu/drm/i915/display/intel_ddi.c | 193 +++++++++-
drivers/gpu/drm/i915/display/intel_display.c | 108 +++++-
drivers/gpu/drm/i915/display/intel_display.h | 20 ++
.../drm/i915/display/intel_display_power.c | 4 +-
.../drm/i915/display/intel_display_types.h | 4 +
drivers/gpu/drm/i915/display/intel_dp.c | 74 +++-
drivers/gpu/drm/i915/display/intel_dp.h | 9 +
drivers/gpu/drm/i915/display/intel_dp_mst.c | 181 +++++++++-
drivers/gpu/drm/i915/display/intel_dp_mst.h | 2 +
drivers/gpu/drm/i915/display/intel_psr.c | 308 +++++++++-------
drivers/gpu/drm/i915/display/intel_psr.h | 2 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 96 ++++-
drivers/gpu/drm/i915/gem/i915_gem_context.c | 4 +-
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 1 +
drivers/gpu/drm/i915/gt/intel_lrc.c | 240 ++++++++++---
drivers/gpu/drm/i915/gt/intel_lrc.h | 2 +
drivers/gpu/drm/i915/gt/intel_lrc_reg.h | 31 +-
drivers/gpu/drm/i915/gt/intel_workarounds.c | 26 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h | 1 +
drivers/gpu/drm/i915/gvt/handlers.c | 2 +-
drivers/gpu/drm/i915/i915_debugfs.c | 18 +-
drivers/gpu/drm/i915/i915_drv.h | 7 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 26 +-
drivers/gpu/drm/i915/i915_irq.c | 54 ++-
drivers/gpu/drm/i915/i915_perf.c | 337 +++++++++++++++---
drivers/gpu/drm/i915/i915_reg.h | 199 +++++++++--
drivers/gpu/drm/i915/intel_csr.c | 4 +-
drivers/gpu/drm/i915/intel_device_info.c | 5 +-
drivers/gpu/drm/i915/intel_pm.c | 19 +-
drivers/gpu/drm/i915/oa/i915_oa_tgl.c | 112 ++++++
drivers/gpu/drm/i915/oa/i915_oa_tgl.h | 16 +
include/uapi/drm/drm_fourcc.h | 20 ++
include/uapi/drm/i915_drm.h | 7 +
35 files changed, 1796 insertions(+), 341 deletions(-)
create mode 100644 drivers/gpu/drm/i915/oa/i915_oa_tgl.c
create mode 100644 drivers/gpu/drm/i915/oa/i915_oa_tgl.h

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2.21.0