From: Ramalingam C <ramalingam.c@intel.com>
To: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 2/2] drm/i915/tgl: Skip Wa_1604555607 verification at A0
Date: Wed, 2 Oct 2019 15:44:24 +0530 [thread overview]
Message-ID: <20191002101423.GA28801@intel.com> (raw)
In-Reply-To: <10417c78-1fc4-25c1-3539-393d9d65e975@linux.intel.com>
On 2019-10-02 at 09:54:12 +0100, Tvrtko Ursulin wrote:
>
> On 01/10/2019 18:36, Chris Wilson wrote:
> > Quoting Ramalingam C (2019-10-01 18:26:24)
> > > Read of FF_MODE2 register is broken at TGL A0. Hence verification of the
> > > Wa_1604555607 associated to that register needs to be skipped.
> > >
> > > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > > cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> > > ---
> > > drivers/gpu/drm/i915/gt/intel_workarounds.c | 22 ++++++++++++++++++++-
> > > drivers/gpu/drm/i915/i915_drv.h | 6 ++++++
> > > 2 files changed, 27 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > > index 4049b876492a..c63d8c3df4d3 100644
> > > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > > @@ -991,10 +991,21 @@ wa_list_apply(struct intel_uncore *uncore, const struct i915_wa_list *wal)
> > > for (i = 0, wa = wal->list; i < wal->count; i++, wa++) {
> > > intel_uncore_rmw_fw(uncore, wa->reg, wa->mask, wa->val);
> > > - if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
> > > + if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)) {
> > > +
> > > + /*
> > > + * Read of FF_MODE2 is broken on TGL A0.
> > > + * Hence skip the corresponding WA verification.
> > > + */
> > > + if (IS_TGL_REVID(uncore->i915, 0, TGL_REVID_A0) &&
> > > + i915_mmio_reg_equal(wa->reg, FF_MODE2) &&
> > > + wa->mask == FF_MODE2_TDS_TIMER_MASK)
> > > + continue;
> >
> > This does not scale very well. You will note that wa_verify() already
> > includes a detail on which bits can be read back from HW.
>
> For the record Chris is referring to wa->read which you can set to zero for
> this particular wa and this should automagically work.
Thanks Tvrtko. We could set that wa->read = 0, only for required steppings.
-Ram
>
> Then in IGT/gem_workarounds.c you also have existing framework for marking
> registers as write-only. It may need extending to account for steppings and
> so.
>
> Regards,
>
> Tvrtko
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next prev parent reply other threads:[~2019-10-02 10:14 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-01 17:26 [PATCH 1/2] drm/i915/tgl: Implement Wa_1604555607 Ramalingam C
2019-10-01 17:26 ` [PATCH 2/2] drm/i915/tgl: Skip Wa_1604555607 verification at A0 Ramalingam C
2019-10-01 17:36 ` Chris Wilson
2019-10-02 8:54 ` Tvrtko Ursulin
2019-10-02 10:14 ` Ramalingam C [this message]
2019-10-01 17:35 ` [PATCH 1/2] drm/i915/tgl: Implement Wa_1604555607 Chris Wilson
2019-10-01 20:16 ` Lucas De Marchi
2019-10-02 5:31 ` Ramalingam C
2019-11-07 6:40 ` Ramalingam C
2019-11-07 6:40 ` [Intel-gfx] " Ramalingam C
2019-10-02 8:55 ` Tvrtko Ursulin
2019-10-01 22:22 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] " Patchwork
2019-10-01 22:45 ` ✓ Fi.CI.BAT: success " Patchwork
2019-10-02 9:29 ` ✓ Fi.CI.IGT: " Patchwork
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