From: Manasi Navare <manasi.d.navare@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 3/3] drm/i915/dp: Disable Port sync mode correctly on teardown
Date: Fri, 13 Dec 2019 12:40:13 -0800 [thread overview]
Message-ID: <20191213204012.GE19224@intel.com> (raw)
In-Reply-To: <20191213200637.GE1208@intel.com>
On Fri, Dec 13, 2019 at 10:06:37PM +0200, Ville Syrjälä wrote:
> On Wed, Dec 11, 2019 at 01:14:25PM -0800, Manasi Navare wrote:
> > While clearing the Ports ync mode enable and master select bits
> > we need to make sure that we perform a RMW for disable else
> > it sets the other bits casuing unwanted sideeffects.
> >
> > Bugzilla: https://gitlab.freedesktop.org/drm/intel/issues/5
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Fixes: 51528afe7c5e ("drm/i915/display/icl: Disable transcoder port sync as part of crtc_disable() sequence")
> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index c0a2dab3fe67..3fccda0f1f36 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -4599,7 +4599,8 @@ static void icl_disable_transcoder_port_sync(const struct intel_crtc_state *old_
> > transcoder_name(old_crtc_state->cpu_transcoder));
> >
> > reg = TRANS_DDI_FUNC_CTL2(old_crtc_state->cpu_transcoder);
> > - trans_ddi_func_ctl2_val = ~(PORT_SYNC_MODE_ENABLE |
> > + trans_ddi_func_ctl2_val = I915_READ(reg);
> > + trans_ddi_func_ctl2_val &= ~(PORT_SYNC_MODE_ENABLE |
> > PORT_SYNC_MODE_MASTER_SELECT_MASK);
> > I915_WRITE(reg, trans_ddi_func_ctl2_val);
>
> I915_WRITE(TRANS_DDI_FUNC_CTL2, 0);
So not even consider the other values that might have been set in this reg?
You would prefer setting this to 0 directly?
Right now i do see that no other bits are set, but things can change when we
start using DSI port sync mode or genlock mode etc.
Manasi
>
> > }
> > --
> > 2.19.1
>
> --
> Ville Syrjälä
> Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-12-13 20:38 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-11 21:14 [Intel-gfx] [PATCH 0/3] i915 fixes to handle hotplug cases on 8K tiled monitor Manasi Navare
2019-12-11 21:14 ` [Intel-gfx] [PATCH 1/3] drm/i915/dp: Make sure all tiled connectors get added to the state with full modeset Manasi Navare
2019-12-13 0:32 ` Matt Roper
2019-12-13 1:18 ` Manasi Navare
2019-12-13 3:11 ` Matt Roper
2019-12-13 20:05 ` Ville Syrjälä
2019-12-13 21:05 ` Manasi Navare
2019-12-13 21:17 ` Ville Syrjälä
2019-12-14 2:28 ` Manasi Navare
2019-12-16 12:03 ` Ville Syrjälä
2019-12-16 16:40 ` Manasi Navare
2019-12-16 17:11 ` Ville Syrjälä
2019-12-16 21:42 ` Manasi Navare
2019-12-16 14:37 ` Ville Syrjälä
2019-12-16 19:13 ` Manasi Navare
2019-12-16 21:37 ` Ville Syrjälä
2019-12-16 22:33 ` Manasi Navare
2019-12-16 22:58 ` Manasi Navare
2019-12-17 10:50 ` Ville Syrjälä
2019-12-17 19:04 ` Manasi Navare
2019-12-19 2:37 ` Manasi Navare
2019-12-11 21:14 ` [Intel-gfx] [PATCH 2/3] drm/i915/dp: Make port sync mode assignments only if all tiles present Manasi Navare
2019-12-13 1:03 ` Matt Roper
2019-12-13 1:09 ` Manasi Navare
2019-12-13 20:28 ` Ville Syrjälä
2019-12-13 20:53 ` Ville Syrjälä
2019-12-13 20:58 ` Manasi Navare
2019-12-11 21:14 ` [Intel-gfx] [PATCH 3/3] drm/i915/dp: Disable Port sync mode correctly on teardown Manasi Navare
2019-12-13 3:14 ` Matt Roper
2019-12-13 20:06 ` Ville Syrjälä
2019-12-13 20:40 ` Manasi Navare [this message]
2019-12-13 20:49 ` Ville Syrjälä
2019-12-12 1:53 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915 fixes to handle hotplug cases on 8K tiled monitor Patchwork
2019-12-12 2:36 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2019-12-12 13:49 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20191213204012.GE19224@intel.com \
--to=manasi.d.navare@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jani.nikula@intel.com \
--cc=ville.syrjala@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).