From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5FEDC43603 for ; Mon, 16 Dec 2019 13:56:37 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 86259206A5 for ; Mon, 16 Dec 2019 13:56:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 86259206A5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2E9026E581; Mon, 16 Dec 2019 13:56:34 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id E47E16E580; Mon, 16 Dec 2019 13:56:32 +0000 (UTC) X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Dec 2019 05:56:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,321,1571727600"; d="scan'208";a="227118511" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by orsmga002.jf.intel.com with SMTP; 16 Dec 2019 05:56:28 -0800 Received: by stinkbox (sSMTP sendmail emulation); Mon, 16 Dec 2019 15:56:27 +0200 Date: Mon, 16 Dec 2019 15:56:27 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Hans de Goede Message-ID: <20191216135627.GS1208@intel.com> References: <20191215163810.52356-1-hdegoede@redhat.com> <20191215163810.52356-5-hdegoede@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20191215163810.52356-5-hdegoede@redhat.com> User-Agent: Mutt/1.10.1 (2018-07-13) Subject: Re: [Intel-gfx] [PATCH 4/5] drm/i915/dsi: Move Crystal Cove PMIC panel GPIO lookup from mfd to the i915 driver X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linus Walleij , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, dri-devel@lists.freedesktop.org, Lee Jones , intel-gfx Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Sun, Dec 15, 2019 at 05:38:09PM +0100, Hans de Goede wrote: > Move the Crystal Cove PMIC panel GPIO lookup-table from > drivers/mfd/intel_soc_pmic_core.c to the i915 driver. > = > The moved looked-up table is adding a GPIO lookup to the i915 PCI > device and the GPIO subsys allows only one lookup table per device, > = > The intel_soc_pmic_core.c code only adds lookup-table entries for the > PMIC panel GPIO (as it deals only with the PMIC), but we also need to be > able to access some GPIOs on the SoC itself, which requires entries for > these GPIOs in the lookup-table. > = > Since the lookup-table is attached to the i915 PCI device it really > should be part of the i915 driver, this will also allow us to extend > it with GPIOs from other sources when necessary. > = > Signed-off-by: Hans de Goede > --- > drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 23 +++++++++++++++++++- > drivers/mfd/intel_soc_pmic_core.c | 19 ---------------- > 2 files changed, 22 insertions(+), 20 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c b/drivers/gpu/d= rm/i915/display/intel_dsi_vbt.c > index 027970348b22..847f04eec2a1 100644 > --- a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c > +++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c > @@ -25,6 +25,7 @@ > */ > = > #include > +#include > #include > #include > = > @@ -686,8 +687,18 @@ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi,= u16 panel_id) > = > /* > * On some BYT/CHT devs some sequences are incomplete and we need to man= ually > - * control some GPIOs. > + * control some GPIOs. We need to add a GPIO lookup table before we get = these. > */ > +static struct gpiod_lookup_table pmic_panel_gpio_table =3D { > + /* Intel GFX is consumer */ > + .dev_id =3D "0000:00:02.0", > + .table =3D { > + /* Panel EN/DISABLE */ > + GPIO_LOOKUP("gpio_crystalcove", 94, "panel", GPIO_ACTIVE_HIGH), > + { }, > + }, > +}; Feels like a failure in abstraction to have these irrelevant details exposed on the consumer side. Also slightly concerned that someone refactoring things in the pmic driver could now break this without realizing it. But if people want it done this way I can live with it. > + > void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_dsi, bool panel_is_= on) > { > struct drm_device *dev =3D intel_dsi->base.base.dev; > @@ -697,6 +708,8 @@ void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_= dsi, bool panel_is_on) > = > if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && > (mipi_config->pwm_blc =3D=3D PPS_BLC_PMIC)) { > + gpiod_add_lookup_table(&pmic_panel_gpio_table); > + > intel_dsi->gpio_panel =3D gpiod_get(dev->dev, "panel", flags); > if (IS_ERR(intel_dsi->gpio_panel)) { > DRM_ERROR("Failed to own gpio for panel control\n"); > @@ -707,8 +720,16 @@ void intel_dsi_vbt_gpio_init(struct intel_dsi *intel= _dsi, bool panel_is_on) > = > void intel_dsi_vbt_gpio_cleanup(struct intel_dsi *intel_dsi) > { > + struct drm_device *dev =3D intel_dsi->base.base.dev; > + struct drm_i915_private *dev_priv =3D to_i915(dev); > + struct mipi_config *mipi_config =3D dev_priv->vbt.dsi.config; > + > if (intel_dsi->gpio_panel) { > gpiod_put(intel_dsi->gpio_panel); > intel_dsi->gpio_panel =3D NULL; > } > + > + if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && > + (mipi_config->pwm_blc =3D=3D PPS_BLC_PMIC)) Needless parens here as well. Reviewed-by: Ville Syrj=E4l=E4 > + gpiod_remove_lookup_table(&pmic_panel_gpio_table); > } > diff --git a/drivers/mfd/intel_soc_pmic_core.c b/drivers/mfd/intel_soc_pm= ic_core.c > index 47188df3080d..ddd64f9e3341 100644 > --- a/drivers/mfd/intel_soc_pmic_core.c > +++ b/drivers/mfd/intel_soc_pmic_core.c > @@ -9,8 +9,6 @@ > */ > = > #include > -#include > -#include > #include > #include > #include > @@ -25,17 +23,6 @@ > #define BYT_CRC_HRV 2 > #define CHT_CRC_HRV 3 > = > -/* Lookup table for the Panel Enable/Disable line as GPIO signals */ > -static struct gpiod_lookup_table panel_gpio_table =3D { > - /* Intel GFX is consumer */ > - .dev_id =3D "0000:00:02.0", > - .table =3D { > - /* Panel EN/DISABLE */ > - GPIO_LOOKUP("gpio_crystalcove", 94, "panel", GPIO_ACTIVE_HIGH), > - { }, > - }, > -}; > - > /* PWM consumed by the Intel GFX */ > static struct pwm_lookup crc_pwm_lookup[] =3D { > PWM_LOOKUP("crystal_cove_pwm", 0, "0000:00:02.0", "pwm_pmic_backlight",= 0, PWM_POLARITY_NORMAL), > @@ -96,9 +83,6 @@ static int intel_soc_pmic_i2c_probe(struct i2c_client *= i2c, > if (ret) > dev_warn(dev, "Can't enable IRQ as wake source: %d\n", ret); > = > - /* Add lookup table binding for Panel Control to the GPIO Chip */ > - gpiod_add_lookup_table(&panel_gpio_table); > - > /* Add lookup table for crc-pwm */ > pwm_add_table(crc_pwm_lookup, ARRAY_SIZE(crc_pwm_lookup)); > = > @@ -121,9 +105,6 @@ static int intel_soc_pmic_i2c_remove(struct i2c_clien= t *i2c) > = > regmap_del_irq_chip(pmic->irq, pmic->irq_chip_data); > = > - /* Remove lookup table for Panel Control from the GPIO Chip */ > - gpiod_remove_lookup_table(&panel_gpio_table); > - > /* remove crc-pwm lookup table */ > pwm_remove_table(crc_pwm_lookup, ARRAY_SIZE(crc_pwm_lookup)); > = > -- = > 2.23.0 -- = Ville Syrj=E4l=E4 Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx