From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9B15C43331 for ; Tue, 31 Mar 2020 17:51:46 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 556BA20675 for ; Tue, 31 Mar 2020 17:51:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 556BA20675 Authentication-Results: mail.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=etezian.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0AE366E872; Tue, 31 Mar 2020 17:51:46 +0000 (UTC) X-Greylist: delayed 1799 seconds by postgrey-1.36 at gabe; Tue, 31 Mar 2020 17:51:44 UTC Received: from 6.mo5.mail-out.ovh.net (6.mo5.mail-out.ovh.net [178.32.119.138]) by gabe.freedesktop.org (Postfix) with ESMTPS id B54716E871 for ; Tue, 31 Mar 2020 17:51:44 +0000 (UTC) Received: from player726.ha.ovh.net (unknown [10.108.54.72]) by mo5.mail-out.ovh.net (Postfix) with ESMTP id 2639C276FD9 for ; Tue, 31 Mar 2020 19:13:16 +0200 (CEST) Received: from etezian.org (213-243-141-64.bb.dnainternet.fi [213.243.141.64]) (Authenticated sender: andi@etezian.org) by player726.ha.ovh.net (Postfix) with ESMTPSA id 1F66010E5A908; Tue, 31 Mar 2020 17:13:10 +0000 (UTC) Date: Tue, 31 Mar 2020 20:13:09 +0300 From: Andi Shyti To: Chris Wilson Message-ID: <20200331171309.GC26946@jack.zhora.eu> References: <20200331164508.51514-1-andi@etezian.org> <158567361246.5852.4972436644557691162@build.alporthouse.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <158567361246.5852.4972436644557691162@build.alporthouse.com> X-Ovh-Tracer-Id: 8803129897050227209 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgeduhedrtddtgdejjecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemucehtddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenucfjughrpeffhffvuffkfhggtggujgesthdtredttddtvdenucfhrhhomheptehnughiucfuhhihthhiuceorghnughisegvthgviihirghnrdhorhhgqeenucfkpheptddrtddrtddrtddpvddufedrvdegfedrudeguddrieegnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmohguvgepshhmthhpqdhouhhtpdhhvghlohepphhlrgihvghrjedviedrhhgrrdhovhhhrdhnvghtpdhinhgvtheptddrtddrtddrtddpmhgrihhlfhhrohhmpegrnhguihesvghtvgiiihgrnhdrohhrghdprhgtphhtthhopehinhhtvghlqdhgfhigsehlihhsthhsrdhfrhgvvgguvghskhhtohhprdhorhhg Subject: Re: [Intel-gfx] [PATCH v3] drm/i915/gt: move remaining debugfs interfaces into gt X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel GFX Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Hi Chris, On Tue, Mar 31, 2020 at 05:53:32PM +0100, Chris Wilson wrote: > Quoting Andi Shyti (2020-03-31 17:45:08) > > +static void intel_sseu_copy_subslices(const struct sseu_dev_info *sseu, > > + int slice, u8 *to_mask) > > +{ > > + int offset = slice * sseu->ss_stride; > > + > > + memcpy(&to_mask[offset], &sseu->subslice_mask[offset], sseu->ss_stride); > > +} > > Worth moving all the sseu into their file? There's quite a few of them > and each quite chunky. > > > +static int interrupt_info_show(struct seq_file *m, void *data) > > And if we start there, we might end up with debugfs_gt_irq.c as well? > (Not that I see any use for this debugfs info :) add a debufs_gt_sseu.c and debugfs_gt_irq.c, isn't it a bit excessive? I also do agree that everything in one file looks a bit stuffed. > > +static int reset_get(void *data, u64 *val) > > +{ > > + struct intel_gt *gt = data; > > + int ret = intel_gt_terminally_wedged(gt); > > + > > + switch (ret) { > > + case -EIO: > > + *val = 1; > > + return 0; > > + case 0: > > + *val = 0; > > + return 0; > > + default: > > + return ret; > > + } > > reset_get? Ok if you document it as reporting wedged status :) > > > +} > > + > > +static int reset_set(void *data, u64 val) > > +{ > > + struct intel_gt *gt = data; > > + > > + /* Flush any previous reset before applying for a new one */ > > + wait_event(gt->reset.queue, > > + !test_bit(I915_RESET_BACKOFF, >->reset.flags)); > > + > > + intel_gt_handle_error(gt, val, I915_ERROR_CAPTURE, > > + "Manually set wedged engine mask = %llx", val); > > No hint of i915_wedged any more. Just "Manual reset engine mask %llx", > or somesuch will do. OK, I will try to improve the transition freom "wedged" to "reset". Thanks. Andi _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx