From: Andi Shyti <andi.shyti@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915/gt: Use the RPM config register to determine clk frequencies
Date: Thu, 16 Apr 2020 23:36:03 +0300 [thread overview]
Message-ID: <20200416203603.GR50947@intel.intel> (raw)
In-Reply-To: <158706923213.5570.9523945865985244311@build.alporthouse.com>
Hi Chris,
On Thu, Apr 16, 2020 at 09:33:52PM +0100, Chris Wilson wrote:
> Quoting Andi Shyti (2020-04-16 21:31:10)
> > Hi Chris,
> >
> > > For many configuration details within RC6 and RPS we are programming
> > > intervals for the internal clocks. From gen11, these clocks are
> > > configuration via the RPM_CONFIG and so for convenience, we would like
> > > to convert to/from more natural units (ns).
> > >
> > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > > Cc: Andi Shyti <andi.shyti@intel.com>
> > > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> > > ---
> > > drivers/gpu/drm/i915/Makefile | 1 +
> > > drivers/gpu/drm/i915/gt/debugfs_gt_pm.c | 27 +++++----
> > > drivers/gpu/drm/i915/gt/intel_gt_clk.c | 76 +++++++++++++++++++++++++
> > > drivers/gpu/drm/i915/gt/intel_gt_clk.h | 21 +++++++
> > > drivers/gpu/drm/i915/gt/intel_rps.c | 37 +++++++-----
> > > drivers/gpu/drm/i915/gt/selftest_rps.c | 6 +-
> > > drivers/gpu/drm/i915/i915_debugfs.c | 34 +++++++----
> > > drivers/gpu/drm/i915/i915_reg.h | 25 --------
> > > 8 files changed, 161 insertions(+), 66 deletions(-)
> > > create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_clk.c
> > > create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_clk.h
> >
> > I like the patch, it's a nice refactoring but the file name is
> > misleading. When I see a *clk.[ch] file I think of a clock device
> > rather than a set of utilities for frequency and interval
> > conversion.
> >
> > Can we call the file intel_gt_timing.[ch] or clk_utils.[ch]?
>
> clk_utils.c
>
> It started off with the idea of just doing the clock probing, but the
> utility routines were more practical.
Reviewed-by: Andi Shyti <andi.shyti@intel.com>
Thank you,
Andi
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next prev parent reply other threads:[~2020-04-16 20:36 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-16 15:50 [Intel-gfx] [PATCH 1/2] drm/i915/gt: Trace RPS events Chris Wilson
2020-04-16 15:51 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Use the RPM config register to determine clk frequencies Chris Wilson
2020-04-16 15:58 ` [Intel-gfx] [PATCH v2] " Chris Wilson
2020-04-16 17:40 ` Chris Wilson
2020-04-16 20:31 ` [Intel-gfx] [PATCH 2/2] " Andi Shyti
2020-04-16 20:33 ` Chris Wilson
2020-04-16 20:36 ` Andi Shyti [this message]
2020-04-16 16:03 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/gt: Trace RPS events Patchwork
2020-04-16 16:21 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-04-16 16:28 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-04-16 16:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/gt: Trace RPS events (rev2) Patchwork
2020-04-16 16:49 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-04-16 16:56 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-04-16 18:43 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/2] drm/i915/gt: Trace RPS events (rev3) Patchwork
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