From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CACA9C433E0 for ; Tue, 9 Jun 2020 11:32:56 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AA72920814 for ; Tue, 9 Jun 2020 11:32:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AA72920814 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5061C892F1; Tue, 9 Jun 2020 11:32:56 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id E7617896AF; Tue, 9 Jun 2020 11:32:54 +0000 (UTC) IronPort-SDR: QCtpK115xx5ZgQI1qUftWKnLcwAKjW4ua5puhJF+hqocRaz+Rld/BNLOS6iRUlUWVdi3LAH8xp o3UVk/iQalQQ== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2020 04:32:54 -0700 IronPort-SDR: lKDKus3APn1bKbgBIwg6urxIw7pI0i/NCuY2+woSiz0eO5RXJTgqSV+j0Rlr0Pox3HxkytogN9 Rn11SihIRlqg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,491,1583222400"; d="scan'208";a="295808008" Received: from smile.fi.intel.com (HELO smile) ([10.237.68.40]) by fmsmga004.fm.intel.com with ESMTP; 09 Jun 2020 04:32:51 -0700 Received: from andy by smile with local (Exim 4.93) (envelope-from ) id 1jicUw-00Bt7J-1x; Tue, 09 Jun 2020 14:32:54 +0300 Date: Tue, 9 Jun 2020 14:32:54 +0300 From: Andy Shevchenko To: Hans de Goede Message-ID: <20200609113254.GN2428291@smile.fi.intel.com> References: <20200607181840.13536-1-hdegoede@redhat.com> <20200607181840.13536-12-hdegoede@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200607181840.13536-12-hdegoede@redhat.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: Re: [Intel-gfx] [PATCH v2 11/15] pwm: crc: Implement get_state() method X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pwm@vger.kernel.org, intel-gfx , "Rafael J . Wysocki" , linux-acpi@vger.kernel.org, dri-devel@lists.freedesktop.org, Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= , Mika Westerberg , Len Brown Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Sun, Jun 07, 2020 at 08:18:36PM +0200, Hans de Goede wrote: > Implement the pwm_ops.get_state() method to complete the support for the > new atomic PWM API. This one is good. Reviewed-by: Andy Shevchenko > Signed-off-by: Hans de Goede > --- > drivers/pwm/pwm-crc.c | 29 +++++++++++++++++++++++++++++ > 1 file changed, 29 insertions(+) > > diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c > index 58c7e9ef7278..6c75a3470bc8 100644 > --- a/drivers/pwm/pwm-crc.c > +++ b/drivers/pwm/pwm-crc.c > @@ -114,8 +114,37 @@ static int crc_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, > return 0; > } > > +static void crc_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, > + struct pwm_state *state) > +{ > + struct crystalcove_pwm *crc_pwm = to_crc_pwm(chip); > + struct device *dev = crc_pwm->chip.dev; > + unsigned int clk_div, clk_div_reg, duty_cycle_reg; > + int error; > + > + error = regmap_read(crc_pwm->regmap, PWM0_CLK_DIV, &clk_div_reg); > + if (error) { > + dev_err(dev, "Error reading PWM0_CLK_DIV %d\n", error); > + return; > + } > + > + error = regmap_read(crc_pwm->regmap, PWM0_DUTY_CYCLE, &duty_cycle_reg); > + if (error) { > + dev_err(dev, "Error reading PWM0_DUTY_CYCLE %d\n", error); > + return; > + } > + > + clk_div = (clk_div_reg & ~PWM_OUTPUT_ENABLE) + 1; > + > + state->period = clk_div * NSEC_PER_MHZ * 256 / PWM_BASE_CLK_MHZ; > + state->duty_cycle = duty_cycle_reg * state->period / PWM_MAX_LEVEL; > + state->polarity = PWM_POLARITY_NORMAL; > + state->enabled = !!(clk_div_reg & PWM_OUTPUT_ENABLE); > +} > + > static const struct pwm_ops crc_pwm_ops = { > .apply = crc_pwm_apply, > + .get_state = crc_pwm_get_state, > }; > > static int crystalcove_pwm_probe(struct platform_device *pdev) > -- > 2.26.2 > -- With Best Regards, Andy Shevchenko _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx