From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,INCLUDES_PULL_REQUEST, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE632C433DF for ; Tue, 23 Jun 2020 03:23:34 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8867F2076A for ; Tue, 23 Jun 2020 03:23:34 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8867F2076A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 12CB16E0AC; Tue, 23 Jun 2020 03:23:34 +0000 (UTC) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id E11C06E0AC; Tue, 23 Jun 2020 03:23:32 +0000 (UTC) IronPort-SDR: 1XN7Mk6w5uzQ//yp9MW6I+/0svmda8Frs9qchHkJl+N9VpAClZmdRCWNIb7nZcmF8BWKh2QY83 A4T4HrqsO0jA== X-IronPort-AV: E=McAfee;i="6000,8403,9660"; a="143012123" X-IronPort-AV: E=Sophos;i="5.75,269,1589266800"; d="asc'?scan'208";a="143012123" X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2020 20:23:31 -0700 IronPort-SDR: F2Jn/PNcQlfDLyjjvhQ3Jo+FRFroVXmx+TQnRj6gLJxzfNftGHvvLMRFwiynv6ehYkJPxzPvqr Ab8BOQM3hwTA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,269,1589266800"; d="asc'?scan'208";a="301060731" Received: from zhen-hp.sh.intel.com (HELO zhen-hp) ([10.239.160.147]) by fmsmga004.fm.intel.com with ESMTP; 22 Jun 2020 20:23:29 -0700 Date: Tue, 23 Jun 2020 11:07:11 +0800 From: Zhenyu Wang To: Joonas Lahtinen Message-ID: <20200623030711.GA5687@zhen-hp.sh.intel.com> References: <20200617043418.GQ5687@zhen-hp.sh.intel.com> <159248448107.8757.1901135788098329902@jlahtine-desk.ger.corp.intel.com> MIME-Version: 1.0 In-Reply-To: <159248448107.8757.1901135788098329902@jlahtine-desk.ger.corp.intel.com> User-Agent: Mutt/1.10.0 (2018-05-17) Subject: Re: [Intel-gfx] [PULL] gvt-fixes X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: Zhenyu Wang Cc: Jani Nikula , intel-gfx , "Yuan, Hang" , "Lv, Zhiyuan" , intel-gvt-dev Content-Type: multipart/mixed; boundary="===============1161371342==" Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" --===============1161371342== Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="Zqu75NDXmDJGUu04" Content-Disposition: inline --Zqu75NDXmDJGUu04 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On 2020.06.18 15:48:01 +0300, Joonas Lahtinen wrote: > Quoting Zhenyu Wang (2020-06-17 07:34:18) > >=20 > > Hi, > >=20 > > This contains misc fixes for gvt. Two MMIO handler fixes on SKL/CFL, > > one mask register bit checking fix exposed in suspend/resume path and > > one lockdep error fix for debugfs entry access. >=20 > Could not pull this one due to the extra hassle with CI this week. >=20 > Jani, can you please pull this next week. >=20 Got it. Please help to pull then. One thing I forgot to mention that change in "drm/i915/gvt: Fix incorrect c= heck of enabled bits in mask registers" would cause a minor conflict if backmerging from linux master to dinq, which is because of new IS_COMETLAKE. Change like below could resolve that. diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt= /handlers.c index 9f48db0bf9d5..78ba2857144e 100644 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c @@ -1734,14 +1734,9 @@ static int ring_mode_mmio_write(struct intel_vgpu *v= gpu, unsigned int offset, return 0; } =20 -<<<<<<< HEAD if ((IS_COFFEELAKE(vgpu->gvt->gt->i915) || IS_COMETLAKE(vgpu->gvt->gt->i915)) && - data & _MASKED_BIT_ENABLE(2)) { -=3D=3D=3D=3D=3D=3D=3D - if (IS_COFFEELAKE(vgpu->gvt->gt->i915) && IS_MASKED_BITS_ENABLED(data, 2)) { ->>>>>>> origin/gvt-next-fixes enter_failsafe_mode(vgpu, GVT_FAILSAFE_UNSUPPORTED_GUEST); return 0; } >=20 > > Thanks. > > -- > > The following changes since commit 8e68c6340d5833077b3753eabedab4075557= 1383: > >=20 > > drm/i915/display: Fix the encoder type check (2020-06-16 11:34:24 +03= 00) > >=20 > > are available in the Git repository at: > >=20 > > https://github.com/intel/gvt-linux tags/gvt-fixes-2020-06-17 > >=20 > > for you to fetch changes up to a291e4fba259a56a6a274c1989997acb6f0bb03a: > >=20 > > drm/i915/gvt: Use GFP_ATOMIC instead of GFP_KERNEL in atomic context = (2020-06-17 12:36:19 +0800) > >=20 > > ---------------------------------------------------------------- > > gvt-fixes-2020-06-17 > >=20 > > - Two missed MMIO handler fixes for SKL/CFL (Colin) > > - Fix mask register bits check (Colin) > > - Fix one lockdep error for debugfs entry access (Colin) > >=20 > > ---------------------------------------------------------------- > > Colin Xu (4): > > drm/i915/gvt: Add one missing MMIO handler for D_SKL_PLUS > > drm/i915/gvt: Fix two CFL MMIO handling caused by regression. > > drm/i915/gvt: Fix incorrect check of enabled bits in mask registe= rs > > drm/i915/gvt: Use GFP_ATOMIC instead of GFP_KERNEL in atomic cont= ext > >=20 > > drivers/gpu/drm/i915/gvt/debugfs.c | 2 +- > > drivers/gpu/drm/i915/gvt/handlers.c | 24 +++++++++++++----------- > > drivers/gpu/drm/i915/gvt/mmio_context.h | 6 +++--- > > drivers/gpu/drm/i915/gvt/reg.h | 5 +++++ > > 4 files changed, 22 insertions(+), 15 deletions(-) > _______________________________________________ > intel-gvt-dev mailing list > intel-gvt-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev --=20 Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 --Zqu75NDXmDJGUu04 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iF0EARECAB0WIQTXuabgHDW6LPt9CICxBBozTXgYJwUCXvFx3wAKCRCxBBozTXgY J4JFAJ4+0JJ5MmD/Fq6el4KQJn67kibLkACfbFKxkbW3UngKKSNUs7V7DSekr/Y= =mDTI -----END PGP SIGNATURE----- --Zqu75NDXmDJGUu04-- --===============1161371342== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1161371342==--