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d="scan'208";a="321536516" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by orsmga007.jf.intel.com with SMTP; 30 Jun 2020 14:25:39 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 01 Jul 2020 00:25:38 +0300 Date: Wed, 1 Jul 2020 00:25:38 +0300 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Manasi Navare Message-ID: <20200630212538.GW6112@intel.com> References: <20200626232641.4557-1-manasi.d.navare@intel.com> <20200630210330.GU6112@intel.com> <20200630211045.GA21520@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200630211045.GA21520@intel.com> X-Patchwork-Hint: comment User-Agent: Mutt/1.10.1 (2018-07-13) Subject: Re: [Intel-gfx] [PATCH v4 1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Tue, Jun 30, 2020 at 02:10:45PM -0700, Manasi Navare wrote: > On Wed, Jul 01, 2020 at 12:03:30AM +0300, Ville Syrj=E4l=E4 wrote: > > On Fri, Jun 26, 2020 at 04:26:40PM -0700, Manasi Navare wrote: > > > Modify the helper to add a fixed delay or poll with timeout > > > based on platform specification to check for either Idle bit > > > set (DDI_BUF_CTL is idle for disable case) > > > = > > > v3: > > > * Change the timeout to 16usecs (Ville) > > > v2: > > > * Use 2 separate functions or idle and active (Ville) > > > = > > > Cc: Ville Syrj=E4l=E4 > > > Cc: Imre Deak > > > Signed-off-by: Manasi Navare > > > --- > > > drivers/gpu/drm/i915/display/intel_ddi.c | 17 ++++++++--------- > > > 1 file changed, 8 insertions(+), 9 deletions(-) > > > = > > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/d= rm/i915/display/intel_ddi.c > > > index 884b507c5f55..052a74625a61 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > > > @@ -1184,16 +1184,15 @@ static void intel_prepare_hdmi_ddi_buffers(st= ruct intel_encoder *encoder, > > > static void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_pri= v, > > > enum port port) > > > { > > > - i915_reg_t reg =3D DDI_BUF_CTL(port); > > > - int i; > > > - > > > - for (i =3D 0; i < 16; i++) { > > > - udelay(1); > > > - if (intel_de_read(dev_priv, reg) & DDI_BUF_IS_IDLE) > > > - return; > > > + if (IS_BROXTON(dev_priv)) { > > > + udelay(16); > > > + return; > > > } > > > - drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c idle bit\n", > > > - port_name(port)); > > > + > > > + if (wait_for_us((intel_de_read(dev_priv, DDI_BUF_CTL(port)) & > > > + DDI_BUF_IS_IDLE), 16)) > > = > > 16 is the BXT number. IIRC the spec said 8 usec for the other platforms. > > > = > Yes I see for HSW atleast yes it says 8usecs but i left it at 16 since th= ats > what we always had and the only change was that BXT add a fixed delay > But if you prefer i will change it to 8us timeout? My usual approach is to a) just use the spec value, b) if there's a sane reason for not using it then include a comment documenting the spec value. Often b) is just for "spec say a few microseconds, let's just wait a full millisecond to make it simple", or for "old platforms want timeout N, new ones want M, just go with the larger of the two for simplicity". Arguably the current code was trying to follow the latter approach, except if was supposed to since bxt wasn't supposed to poll at all. Anyways, since the current code already used 16 usec without any clarification I guess this is no worse than what we had. Reviewed-by: Ville Syrj=E4l=E4 > = > Manasi > = > > > + drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c to get idl= e\n", > > > + port_name(port)); > > > } > > > = > > > static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pl= l) > > > -- = > > > 2.19.1 > > = > > -- = > > Ville Syrj=E4l=E4 > > Intel -- = Ville Syrj=E4l=E4 Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx