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Wysocki" , linux-acpi@vger.kernel.org, dri-devel@lists.freedesktop.org, Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= , Andy Shevchenko , Mika Westerberg , Len Brown Content-Type: multipart/mixed; boundary="===============0392926518==" Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" --===============0392926518== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="gKMricLos+KVdGMg" Content-Disposition: inline --gKMricLos+KVdGMg Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sun, Aug 30, 2020 at 02:57:39PM +0200, Hans de Goede wrote: > According to the data-sheet the way the PWM controller works is that > each input clock-cycle the base_unit gets added to a N bit counter and > that counter overflowing determines the PWM output frequency. >=20 > So assuming e.g. a 16 bit counter this means that if base_unit is set to = 1, > after 65535 input clock-cycles the counter has been increased from 0 to > 65535 and it will overflow on the next cycle, so it will overflow after > every 65536 clock cycles and thus the calculations done in > pwm_lpss_prepare() should use 65536 and not 65535. >=20 > This commit fixes this. Note this also aligns the calculations in > pwm_lpss_prepare() with those in pwm_lpss_get_state(). >=20 > Note this effectively reverts commit 684309e5043e ("pwm: lpss: Avoid > potential overflow of base_unit"). The next patch in this series really > fixes the potential overflow of the base_unit value. >=20 > Fixes: 684309e5043e ("pwm: lpss: Avoid potential overflow of base_unit") > Reviewed-by: Andy Shevchenko > Acked-by: Uwe Kleine-K=C3=B6nig > Signed-off-by: Hans de Goede > --- > Changes in v3: > - Add Fixes tag > - Add Reviewed-by: Andy Shevchenko tag > --- > drivers/pwm/pwm-lpss.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) Acked-by: Thierry Reding --gKMricLos+KVdGMg Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl9M2I0ACgkQ3SOs138+ s6Hw2hAAqAqAOI9uH2Oa1iIBiZ7kl7dMlH4o44762/BfghrA3zUGN6pkdU81XXek OzXbmvNQRdJQ9lfcnF+gIchRwyvSALGkKtLrumEl/A20WsXW/2u4ACfHybEZoG2X pqN3Hr4N0dheBVY9s5L41LJy+MMNrb5y0uKdAAfolLdCzOOVBBYwmpmspzyJ4PDp LAD+UvHNEv/UIAecUGhK4NQKxvIXbuVWK86WbTox29HvCH5iSr2AEfj2sJBpPWeh hv6h3615nmmLAATD9iFhVO5ek15uNyrZuCNMV0GLmjBZZS4p84DlqEaxIvZD1QCk 2jbpFS6P16v5VFnQD1l3GAe9gvIMK8iqqwKbn3DKZ/v72TBjpBv5HdEvxyT96npb Po6oET7Wx8erAqh/T4KPiVzLMnsbFJHOZk2bW5G1C7cBopZGrmIean9d+BhGBldr qt4r8CY6Mvnx8Vqru5087KrMGCmHlgsNspZ/p77Z2v6/kVcCOZCQVME+hpAkX98Y 1qZIX5VFhuYnFgcCuR1ZzOEV0avpKJUbqQD/bBnJmWmqA20y1Hb0BAHg7Ny3+mVZ fkf4aMuj+iWzMxnmMqgij8+5OrF5NpcX8x9z4tWgYCmmVw8f/fuu4vfCxEJKcYE9 ohTC5zGrJ9E8jm0PknM4q+Ea7XEAKE5Oc+Ut6DOLoeArxPExaSM= =DtUS -----END PGP SIGNATURE----- --gKMricLos+KVdGMg-- --===============0392926518== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0392926518==--