From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.5 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27A70C433E2 for ; Tue, 1 Sep 2020 11:23:59 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EF667206C0 for ; Tue, 1 Sep 2020 11:23:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EF667206C0 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4D31C6E856; Tue, 1 Sep 2020 11:23:54 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id EFEDF6E851; Tue, 1 Sep 2020 11:23:52 +0000 (UTC) IronPort-SDR: sh0LLEPQdcPEeL2uWcJYbQ7dtISE7C6czbDMwf3P939yIrqd7BJgW7k8zSS5omM8eJGLP8rRYx +ppCm1J5KcWQ== X-IronPort-AV: E=McAfee;i="6000,8403,9730"; a="221374455" X-IronPort-AV: E=Sophos;i="5.76,378,1592895600"; d="scan'208";a="221374455" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Sep 2020 04:23:51 -0700 IronPort-SDR: 9jMaMimnULPxsbY+BVrJE3ofFWTQbfT/f4sPaguGSl8NQAjuId29yOljEqNIVBv0zcRCU4OiBy MGyCkaJQoE5Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,378,1592895600"; d="scan'208";a="340993898" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by orsmga007.jf.intel.com with SMTP; 01 Sep 2020 04:23:47 -0700 Received: by stinkbox (sSMTP sendmail emulation); Tue, 01 Sep 2020 14:23:46 +0300 Date: Tue, 1 Sep 2020 14:23:46 +0300 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Karthik B S Message-ID: <20200901112346.GI6112@intel.com> References: <20200807093551.10673-1-karthik.b.s@intel.com> <20200807093551.10673-5-karthik.b.s@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200807093551.10673-5-karthik.b.s@intel.com> X-Patchwork-Hint: comment User-Agent: Mutt/1.10.1 (2018-07-13) Subject: Re: [Intel-gfx] [PATCH v6 4/7] drm/i915: Do not call drm_crtc_arm_vblank_event in async flips X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: paulo.r.zanoni@intel.com, michel@daenzer.net, dri-devel@lists.freedesktop.org, nicholas.kazlauskas@amd.com, daniel.vetter@intel.com, harry.wentland@amd.com, intel-gfx@lists.freedesktop.org Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Fri, Aug 07, 2020 at 03:05:48PM +0530, Karthik B S wrote: > Since the flip done event will be sent in the flip_done_handler, > no need to add the event to the list and delay it for later. > = > v2: -Moved the async check above vblank_get as it > was causing issues for PSR. > = > v3: -No need to wait for vblank to pass, as this wait was causing a > 16ms delay once every few flips. > = > v4: -Rebased. > = > v5: -Rebased. > = > v6: -Rebased. > = > Signed-off-by: Karthik B S > Signed-off-by: Vandita Kulkarni > --- > drivers/gpu/drm/i915/display/intel_sprite.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > = > diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/dr= m/i915/display/intel_sprite.c > index c26ca029fc0a..2b2d96c59d7f 100644 > --- a/drivers/gpu/drm/i915/display/intel_sprite.c > +++ b/drivers/gpu/drm/i915/display/intel_sprite.c > @@ -93,6 +93,9 @@ void intel_pipe_update_start(const struct intel_crtc_st= ate *new_crtc_state) > DEFINE_WAIT(wait); > u32 psr_status; > = > + if (new_crtc_state->uapi.async_flip) > + goto irq_disable; We shouldn't really need the irq disable at all if we don't do the vblank evade. And if we only write ctl+surf then atomicity is already guaranteed by the hw. > + > vblank_start =3D adjusted_mode->crtc_vblank_start; > if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) > vblank_start =3D DIV_ROUND_UP(vblank_start, 2); > @@ -206,7 +209,7 @@ void intel_pipe_update_end(struct intel_crtc_state *n= ew_crtc_state) > * Would be slightly nice to just grab the vblank count and arm the > * event outside of the critical section - the spinlock might spin for a > * while ... */ > - if (new_crtc_state->uapi.event) { > + if (new_crtc_state->uapi.event && !new_crtc_state->uapi.async_flip) { > drm_WARN_ON(&dev_priv->drm, > drm_crtc_vblank_get(&crtc->base) !=3D 0); > = > @@ -220,6 +223,9 @@ void intel_pipe_update_end(struct intel_crtc_state *n= ew_crtc_state) > = > local_irq_enable(); > = > + if (new_crtc_state->uapi.async_flip) > + return; > + > if (intel_vgpu_active(dev_priv)) > return; > = > -- = > 2.22.0 -- = Ville Syrj=E4l=E4 Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx