From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1D21C41604 for ; Tue, 6 Oct 2020 09:09:19 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7CAC32078E for ; Tue, 6 Oct 2020 09:09:19 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7CAC32078E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; 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d="scan'208";a="353393487" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by FMSMGA003.fm.intel.com with SMTP; 06 Oct 2020 02:09:16 -0700 Received: by stinkbox (sSMTP sendmail emulation); Tue, 06 Oct 2020 12:09:15 +0300 Date: Tue, 6 Oct 2020 12:09:15 +0300 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: "Shankar, Uma" Message-ID: <20201006090915.GU6112@intel.com> References: <20200914210047.11972-1-uma.shankar@intel.com> <20200914210047.11972-7-uma.shankar@intel.com> <20200929162038.GD6112@intel.com> <5b36dcf01f524edd8c95f363478fab20@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <5b36dcf01f524edd8c95f363478fab20@intel.com> X-Patchwork-Hint: comment User-Agent: Mutt/1.10.1 (2018-07-13) Subject: Re: [Intel-gfx] [v6 06/11] drm/i915/display: Implement infoframes readback for LSPCON X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "intel-gfx@lists.freedesktop.org" Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Mon, Oct 05, 2020 at 09:36:35PM +0000, Shankar, Uma wrote: > = > = > > -----Original Message----- > > From: Ville Syrj=E4l=E4 > > Sent: Tuesday, September 29, 2020 9:51 PM > > To: Shankar, Uma > > Cc: intel-gfx@lists.freedesktop.org > > Subject: Re: [v6 06/11] drm/i915/display: Implement infoframes readback= for > > LSPCON > > = > > On Tue, Sep 15, 2020 at 02:30:42AM +0530, Uma Shankar wrote: > > > Implemented Infoframes enabled readback for LSPCON devices. > > > This will help align the implementation with state readback > > > infrastructure. > > > > > > v2: Added proper bitmask of enabled infoframes as per Ville's > > > recommendation. > > > > > > Signed-off-by: Uma Shankar > > > --- > > > drivers/gpu/drm/i915/display/intel_lspcon.c | 57 > > > ++++++++++++++++++++- > > > 1 file changed, 55 insertions(+), 2 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c > > > b/drivers/gpu/drm/i915/display/intel_lspcon.c > > > index 60863b825cc5..565913b8e656 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_lspcon.c > > > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c > > > @@ -576,11 +576,64 @@ void lspcon_set_infoframes(struct intel_encoder > > *encoder, > > > buf, ret); > > > } > > > > > > +static bool _lspcon_read_avi_infoframe_enabled_mca(struct drm_dp_aux > > > +*aux) { > > > + int ret; > > > + u32 val =3D 0; > > > + u16 reg =3D LSPCON_MCA_AVI_IF_CTRL; > > > + > > > + ret =3D drm_dp_dpcd_read(aux, reg, &val, 1); > > > + if (ret < 0) { > > > + DRM_ERROR("DPCD read failed, address 0x%x\n", reg); > > > + return false; > > > + } > > > + > > > + return val & LSPCON_MCA_AVI_IF_KICKOFF; } > > > + > > > +static bool _lspcon_read_avi_infoframe_enabled_parade(struct > > > +drm_dp_aux *aux) { > > > + int ret; > > > + u32 val =3D 0; > > > + u16 reg =3D LSPCON_PARADE_AVI_IF_CTRL; > > > + > > > + ret =3D drm_dp_dpcd_read(aux, reg, &val, 1); > > > + if (ret < 0) { > > > + DRM_ERROR("DPCD read failed, address 0x%x\n", reg); > > > + return false; > > > + } > > > + > > > + return val & LSPCON_PARADE_AVI_IF_KICKOFF; } > > > + > > > u32 lspcon_infoframes_enabled(struct intel_encoder *encoder, > > > const struct intel_crtc_state *pipe_config) { > > > - /* FIXME actually read this from the hw */ > > > - return 0; > > > + struct intel_dp *intel_dp =3D enc_to_intel_dp(encoder); > > > + struct intel_lspcon *lspcon =3D enc_to_intel_lspcon(encoder); > > > + struct drm_i915_private *dev_priv =3D to_i915(encoder->base.dev); > > > + bool infoframes_enabled; > > > + u32 val =3D 0; > > > + u32 mask, tmp; > > > + > > > + if (lspcon->vendor =3D=3D LSPCON_VENDOR_MCA) > > > + infoframes_enabled =3D > > _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux); > > > + else > > > + infoframes_enabled =3D > > > +_lspcon_read_avi_infoframe_enabled_parade(&intel_dp->aux); > > > + > > > + if (infoframes_enabled) > > > + val |=3D VIDEO_DIP_ENABLE_AVI_HSW; > > = > > Still not a fan of abusing the HSW specific reg values here. > = > I just kept it so that rest of the infrastructure can be re-used easily. = So the AVI and GMP > bit fields will get re-used and will not require any separate handling. Using the abstract infoframe types wouldn't prevent that. > = > > > + > > > + if (lspcon->hdr_supported) { > > > + tmp =3D intel_de_read(dev_priv, > > > + HSW_TVIDEO_DIP_CTL(pipe_config- > > >cpu_transcoder)); > > > + mask =3D VIDEO_DIP_ENABLE_GMP_HSW; > > > + > > > + if (tmp & mask) > > > + val |=3D mask; > > > + } > > > + > > > + return val; > > > } > > > > > > void lspcon_resume(struct intel_lspcon *lspcon) > > > -- > > > 2.26.2 > > = > > -- > > Ville Syrj=E4l=E4 > > Intel -- = Ville Syrj=E4l=E4 Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx