From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v4 52/61] drm/i915/selftests: Prepare execlists for obj->mm.lock removal
Date: Fri, 16 Oct 2020 12:44:35 +0200 [thread overview]
Message-ID: <20201016104444.1492028-53-maarten.lankhorst@linux.intel.com> (raw)
In-Reply-To: <20201016104444.1492028-1-maarten.lankhorst@linux.intel.com>
Convert normal functions to unlocked versions where needed.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 34 +++++++++++++-------------
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 95d41c01d0e0..124011f6fb51 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -1007,7 +1007,7 @@ static int live_timeslice_preempt(void *arg)
goto err_obj;
}
- vaddr = i915_gem_object_pin_map(obj, I915_MAP_WC);
+ vaddr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
goto err_obj;
@@ -1315,7 +1315,7 @@ static int live_timeslice_queue(void *arg)
goto err_obj;
}
- vaddr = i915_gem_object_pin_map(obj, I915_MAP_WC);
+ vaddr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
goto err_obj;
@@ -1562,7 +1562,7 @@ static int live_busywait_preempt(void *arg)
goto err_ctx_lo;
}
- map = i915_gem_object_pin_map(obj, I915_MAP_WC);
+ map = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(map)) {
err = PTR_ERR(map);
goto err_obj;
@@ -2678,7 +2678,7 @@ static int create_gang(struct intel_engine_cs *engine,
if (err)
goto err_obj;
- cs = i915_gem_object_pin_map(obj, I915_MAP_WC);
+ cs = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(cs))
goto err_obj;
@@ -2960,7 +2960,7 @@ static int live_preempt_gang(void *arg)
* it will terminate the next lowest spinner until there
* are no more spinners and the gang is complete.
*/
- cs = i915_gem_object_pin_map(rq->batch->obj, I915_MAP_WC);
+ cs = i915_gem_object_pin_map_unlocked(rq->batch->obj, I915_MAP_WC);
if (!IS_ERR(cs)) {
*cs = 0;
i915_gem_object_unpin_map(rq->batch->obj);
@@ -3025,7 +3025,7 @@ create_gpr_user(struct intel_engine_cs *engine,
return ERR_PTR(err);
}
- cs = i915_gem_object_pin_map(obj, I915_MAP_WC);
+ cs = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(cs)) {
i915_vma_put(vma);
return ERR_CAST(cs);
@@ -3235,7 +3235,7 @@ static int live_preempt_user(void *arg)
if (IS_ERR(global))
return PTR_ERR(global);
- result = i915_gem_object_pin_map(global->obj, I915_MAP_WC);
+ result = i915_gem_object_pin_map_unlocked(global->obj, I915_MAP_WC);
if (IS_ERR(result)) {
i915_vma_unpin_and_release(&global, 0);
return PTR_ERR(result);
@@ -3628,7 +3628,7 @@ static int live_preempt_smoke(void *arg)
goto err_free;
}
- cs = i915_gem_object_pin_map(smoke.batch, I915_MAP_WB);
+ cs = i915_gem_object_pin_map_unlocked(smoke.batch, I915_MAP_WB);
if (IS_ERR(cs)) {
err = PTR_ERR(cs);
goto err_batch;
@@ -4231,7 +4231,7 @@ static int preserved_virtual_engine(struct intel_gt *gt,
goto out_end;
}
- cs = i915_gem_object_pin_map(scratch->obj, I915_MAP_WB);
+ cs = i915_gem_object_pin_map_unlocked(scratch->obj, I915_MAP_WB);
if (IS_ERR(cs)) {
err = PTR_ERR(cs);
goto out_end;
@@ -5259,7 +5259,7 @@ static int __live_lrc_gpr(struct intel_engine_cs *engine,
goto err_rq;
}
- cs = i915_gem_object_pin_map(scratch->obj, I915_MAP_WB);
+ cs = i915_gem_object_pin_map_unlocked(scratch->obj, I915_MAP_WB);
if (IS_ERR(cs)) {
err = PTR_ERR(cs);
goto err_rq;
@@ -5553,7 +5553,7 @@ store_context(struct intel_context *ce, struct i915_vma *scratch)
if (IS_ERR(batch))
return batch;
- cs = i915_gem_object_pin_map(batch->obj, I915_MAP_WC);
+ cs = i915_gem_object_pin_map_unlocked(batch->obj, I915_MAP_WC);
if (IS_ERR(cs)) {
i915_vma_put(batch);
return ERR_CAST(cs);
@@ -5717,7 +5717,7 @@ static struct i915_vma *load_context(struct intel_context *ce, u32 poison)
if (IS_ERR(batch))
return batch;
- cs = i915_gem_object_pin_map(batch->obj, I915_MAP_WC);
+ cs = i915_gem_object_pin_map_unlocked(batch->obj, I915_MAP_WC);
if (IS_ERR(cs)) {
i915_vma_put(batch);
return ERR_CAST(cs);
@@ -5831,29 +5831,29 @@ static int compare_isolation(struct intel_engine_cs *engine,
u32 *defaults;
int err = 0;
- A[0] = i915_gem_object_pin_map(ref[0]->obj, I915_MAP_WC);
+ A[0] = i915_gem_object_pin_map_unlocked(ref[0]->obj, I915_MAP_WC);
if (IS_ERR(A[0]))
return PTR_ERR(A[0]);
- A[1] = i915_gem_object_pin_map(ref[1]->obj, I915_MAP_WC);
+ A[1] = i915_gem_object_pin_map_unlocked(ref[1]->obj, I915_MAP_WC);
if (IS_ERR(A[1])) {
err = PTR_ERR(A[1]);
goto err_A0;
}
- B[0] = i915_gem_object_pin_map(result[0]->obj, I915_MAP_WC);
+ B[0] = i915_gem_object_pin_map_unlocked(result[0]->obj, I915_MAP_WC);
if (IS_ERR(B[0])) {
err = PTR_ERR(B[0]);
goto err_A1;
}
- B[1] = i915_gem_object_pin_map(result[1]->obj, I915_MAP_WC);
+ B[1] = i915_gem_object_pin_map_unlocked(result[1]->obj, I915_MAP_WC);
if (IS_ERR(B[1])) {
err = PTR_ERR(B[1]);
goto err_B0;
}
- lrc = i915_gem_object_pin_map(ce->state->obj,
+ lrc = i915_gem_object_pin_map_unlocked(ce->state->obj,
i915_coherent_map_type(engine->i915));
if (IS_ERR(lrc)) {
err = PTR_ERR(lrc);
--
2.28.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-10-16 10:45 UTC|newest]
Thread overview: 139+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-16 10:43 [Intel-gfx] [PATCH v4 00/61] drm/i915: Remove obj->mm.lock! Maarten Lankhorst
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 01/61] drm/i915: Move cmd parser pinning to execbuffer Maarten Lankhorst
2020-11-03 13:49 ` Thomas Hellström
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 02/61] drm/i915: Add missing -EDEADLK handling to execbuf pinning Maarten Lankhorst
2020-10-20 20:18 ` Matthew Brost
2020-10-30 8:43 ` Maarten Lankhorst
2020-10-30 15:11 ` Thomas Hellström
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 03/61] drm/i915: Do not share hwsp across contexts any more, v4 Maarten Lankhorst
2020-10-16 10:59 ` [Intel-gfx] [PATCH v4] " Maarten Lankhorst
2020-10-19 12:49 ` [Intel-gfx] [PATCH] drm/i915: Do not share hwsp across contexts any more, v5 Maarten Lankhorst
2020-10-19 13:01 ` [Intel-gfx] [PATCH v5.1] " Maarten Lankhorst
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 04/61] drm/i915: Pin timeline map after first timeline pin, v3 Maarten Lankhorst
2020-10-16 12:30 ` [Intel-gfx] [PATCH v4.1] " Maarten Lankhorst
2020-10-16 14:16 ` [Intel-gfx] [PATCH v4.2] " Maarten Lankhorst
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 05/61] drm/i915: Ensure we hold the object mutex in pin correctly Maarten Lankhorst
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 06/61] drm/i915: Add gem object locking to madvise Maarten Lankhorst
2020-10-30 8:26 ` Thomas Hellström
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 07/61] drm/i915: Move HAS_STRUCT_PAGE to obj->flags Maarten Lankhorst
2020-10-30 8:31 ` Thomas Hellström
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 08/61] drm/i915: Rework struct phys attachment handling Maarten Lankhorst
2020-10-30 8:34 ` Thomas Hellström
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 09/61] drm/i915: Convert i915_gem_object_attach_phys() to ww locking Maarten Lankhorst
2020-10-30 8:38 ` Thomas Hellström (Intel)
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 10/61] drm/i915: make lockdep slightly happier about execbuf Maarten Lankhorst
2020-10-30 8:59 ` Thomas Hellström
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 11/61] drm/i915: Disable userptr pread/pwrite support Maarten Lankhorst
2020-10-30 9:03 ` Thomas Hellström
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 12/61] drm/i915: No longer allow exporting userptr through dma-buf Maarten Lankhorst
2020-10-30 9:04 ` Thomas Hellström (Intel)
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 13/61] drm/i915: Reject more ioctls for userptr Maarten Lankhorst
2020-10-30 9:22 ` Thomas Hellström (Intel)
2020-10-30 9:56 ` Maarten Lankhorst
2020-10-30 14:14 ` Thomas Hellström (Intel)
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 14/61] drm/i915: Reject UNSYNCHRONIZED " Maarten Lankhorst
2020-10-30 9:26 ` Thomas Hellström (Intel)
2020-10-30 10:10 ` Maarten Lankhorst
2020-10-30 14:15 ` Thomas Hellström (Intel)
2020-10-30 10:11 ` Maarten Lankhorst
2020-10-30 14:18 ` Thomas Hellström (Intel)
2020-11-02 8:50 ` Maarten Lankhorst
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 15/61] drm/i915: Fix userptr so we do not have to worry about obj->mm.lock, v4 Maarten Lankhorst
2020-10-19 7:30 ` Thomas Hellström (Intel)
2020-10-19 7:52 ` Thomas Hellström (Intel)
2020-10-19 8:10 ` Maarten Lankhorst
2020-10-20 6:28 ` Thomas Hellström (Intel)
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 16/61] drm/i915: Flatten obj->mm.lock Maarten Lankhorst
2020-10-30 9:36 ` Thomas Hellström (Intel)
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 17/61] drm/i915: Populate logical context during first pin Maarten Lankhorst
2020-10-30 9:42 ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 18/61] drm/i915: Make ring submission compatible with obj->mm.lock removal, v2 Maarten Lankhorst
2020-10-30 9:46 ` Thomas Hellström (Intel)
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 19/61] drm/i915: Handle ww locking in init_status_page Maarten Lankhorst
2020-10-30 9:48 ` Thomas Hellström (Intel)
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 20/61] drm/i915: Rework clflush to work correctly without obj->mm.lock Maarten Lankhorst
2020-10-30 15:08 ` Thomas Hellström
2020-11-02 8:48 ` Maarten Lankhorst
2020-11-02 9:22 ` Thomas Hellström
2020-11-05 7:10 ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 21/61] drm/i915: Pass ww ctx to intel_pin_to_display_plane Maarten Lankhorst
2020-11-03 13:54 ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 22/61] drm/i915: Add object locking to vm_fault_cpu Maarten Lankhorst
2020-10-30 15:14 ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 23/61] drm/i915: Move pinning to inside engine_wa_list_verify() Maarten Lankhorst
2020-10-30 15:17 ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 24/61] drm/i915: Take reservation lock around i915_vma_pin Maarten Lankhorst
2020-10-30 15:21 ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 25/61] drm/i915: Make intel_init_workaround_bb more compatible with ww locking Maarten Lankhorst
2020-10-30 15:23 ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 26/61] drm/i915: Make __engine_unpark() " Maarten Lankhorst
2020-10-16 14:08 ` [Intel-gfx] [PATCH v4.1] " Maarten Lankhorst
2020-10-30 15:25 ` [Intel-gfx] [PATCH v4 26/61] " Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 27/61] drm/i915: Take obj lock around set_domain ioctl Maarten Lankhorst
2020-11-02 9:56 ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 28/61] drm/i915: Defer pin calls in buffer pool until first use by caller Maarten Lankhorst
2020-11-02 9:53 ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 29/61] drm/i915: Fix pread/pwrite to work with new locking rules Maarten Lankhorst
2020-11-02 10:00 ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 30/61] drm/i915: Fix workarounds selftest, part 1 Maarten Lankhorst
2020-11-02 10:06 ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 31/61] drm/i915: Prepare for obj->mm.lock removal Maarten Lankhorst
2020-11-02 10:13 ` Thomas Hellström
2020-11-04 16:01 ` Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 32/61] drm/i915: Add igt_spinner_pin() to allow for ww locking around spinner Maarten Lankhorst
2020-11-03 8:55 ` Thomas Hellström (Intel)
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 33/61] drm/i915: Add ww locking around vm_access() Maarten Lankhorst
2020-11-03 8:56 ` Thomas Hellström (Intel)
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 34/61] drm/i915: Increase ww locking for perf Maarten Lankhorst
2020-11-03 8:58 ` Thomas Hellström (Intel)
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 35/61] drm/i915: Lock ww in ucode objects correctly Maarten Lankhorst
2020-11-03 9:00 ` Thomas Hellström (Intel)
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 36/61] drm/i915: Add ww locking to dma-buf ops Maarten Lankhorst
2020-11-03 9:02 ` Thomas Hellström (Intel)
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 37/61] drm/i915: Add missing ww lock in intel_dsb_prepare Maarten Lankhorst
2020-11-03 9:04 ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 38/61] drm/i915: Fix ww locking in shmem_create_from_object Maarten Lankhorst
2020-11-03 9:06 ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 39/61] drm/i915: Use a single page table lock for each gtt Maarten Lankhorst
2020-11-03 9:09 ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 40/61] drm/i915/selftests: Prepare huge_pages testcases for obj->mm.lock removal Maarten Lankhorst
2020-11-03 13:21 ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 41/61] drm/i915/selftests: Prepare client blit " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 42/61] drm/i915/selftests: Prepare coherency tests " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 43/61] drm/i915/selftests: Prepare context " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 44/61] drm/i915/selftests: Prepare dma-buf " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 45/61] drm/i915/selftests: Prepare execbuf " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 46/61] drm/i915/selftests: Prepare mman testcases " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 47/61] drm/i915/selftests: Prepare object tests " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 48/61] drm/i915/selftests: Prepare object blit " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 49/61] drm/i915/selftests: Prepare igt_gem_utils " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 50/61] drm/i915/selftests: Prepare context selftest " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 51/61] drm/i915/selftests: Prepare hangcheck " Maarten Lankhorst
2020-10-16 10:44 ` Maarten Lankhorst [this message]
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 53/61] drm/i915/selftests: Prepare mocs tests " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 54/61] drm/i915/selftests: Prepare ring submission " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 55/61] drm/i915/selftests: Prepare timeline tests " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 56/61] drm/i915/selftests: Prepare i915_request " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 57/61] drm/i915/selftests: Prepare memory region " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 58/61] drm/i915/selftests: Prepare cs engine " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 59/61] drm/i915/selftests: Prepare gtt " Maarten Lankhorst
2020-11-03 13:27 ` Thomas Hellström
2020-11-03 13:32 ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 60/61] drm/i915: Finally remove obj->mm.lock Maarten Lankhorst
2020-11-03 13:31 ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 61/61] drm/i915: Keep userpointer bindings if seqcount is unchanged, v2 Maarten Lankhorst
2020-10-19 7:02 ` Thomas Hellström (Intel)
2020-10-16 10:49 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Remove obj->mm.lock! (rev4) Patchwork
2020-10-16 11:18 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Remove obj->mm.lock! (rev5) Patchwork
2020-10-16 12:52 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Remove obj->mm.lock! (rev6) Patchwork
2020-10-16 15:59 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Remove obj->mm.lock! (rev8) Patchwork
2020-10-16 16:00 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-16 16:02 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-10-16 16:25 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-16 18:31 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-10-19 12:53 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Remove obj->mm.lock! (rev9) Patchwork
2020-10-19 13:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Remove obj->mm.lock! (rev10) Patchwork
2020-10-19 13:27 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-19 13:29 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-10-19 13:51 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-19 15:33 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201016104444.1492028-53-maarten.lankhorst@linux.intel.com \
--to=maarten.lankhorst@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).