From: Lee Shawn C <shawn.c.lee@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Cooper Chiou <cooper.chiou@intel.com>
Subject: [Intel-gfx] [PATCH v2] drm/i915/rkl: new rkl ddc map for different PCH
Date: Fri, 30 Oct 2020 21:41:37 +0800 [thread overview]
Message-ID: <20201030134137.30867-1-shawn.c.lee@intel.com> (raw)
In-Reply-To: <20201028144312.12520-1-shawn.c.lee@intel.com>
After boot into kernel. Driver configured ddc pin mapping based on
predefined table in parse_ddi_port(). Now driver configure rkl
ddc pin mapping depends on icp_ddc_pin_map[]. Then this table will
give incorrect gmbus port number to cause HDMI can't work.
Refer to commit d0a89527d06 ("drm/i915/rkl: Add DDC pin mapping").
Create two ddc pin table for rkl TGP and CMP pch. Then HDMI can
works properly on rkl.
v2: update patch based on latest dinq branch.
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Aditya Swarup <aditya.swarup@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Cc: Khaled Almahallawy <khaled.almahallawy@intel.com>
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2577
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 20 +++++++++++++++++++
drivers/gpu/drm/i915/display/intel_vbt_defs.h | 4 ++++
2 files changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 0a309645fe06..ca9426e1768a 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1623,6 +1623,18 @@ static const u8 icp_ddc_pin_map[] = {
[TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
};
+static const u8 rkl_pch_tgp_ddc_pin_map[] = {
+ [RKL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
+ [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
+ [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
+};
+
+static const u8 rkl_pch_cmp_ddc_pin_map[] = {
+ [RKL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
+ [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_3_BXT,
+ [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_4_CNP,
+};
+
static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
{
const u8 *ddc_pin_map;
@@ -1630,6 +1642,14 @@ static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1) {
return vbt_pin;
+ } else if (IS_ROCKETLAKE(dev_priv)) {
+ if (INTEL_PCH_TYPE(dev_priv) >= PCH_TGP) {
+ ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
+ n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
+ } else {
+ ddc_pin_map = rkl_pch_cmp_ddc_pin_map;
+ n_entries = ARRAY_SIZE(rkl_pch_cmp_ddc_pin_map);
+ }
} else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) {
ddc_pin_map = icp_ddc_pin_map;
n_entries = ARRAY_SIZE(icp_ddc_pin_map);
diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index 49b4b5fca941..2df009996128 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -319,6 +319,10 @@ enum vbt_gmbus_ddi {
ICL_DDC_BUS_DDI_A = 0x1,
ICL_DDC_BUS_DDI_B,
TGL_DDC_BUS_DDI_C,
+ RKL_DDC_BUS_DDI_B = 0x1,
+ RKL_DDC_BUS_DDI_C,
+ RKL_DDC_BUS_DDI_D,
+ RKL_DDC_BUS_DDI_E,
ICL_DDC_BUS_PORT_1 = 0x4,
ICL_DDC_BUS_PORT_2,
ICL_DDC_BUS_PORT_3,
--
2.28.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-10-30 13:38 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-28 14:43 [Intel-gfx] [PATCH] drm/i915/rkl: new rkl ddc map for different PCH Lee Shawn C
2020-10-28 15:09 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for " Patchwork
2020-10-29 8:10 ` [Intel-gfx] [PATCH] " Jani Nikula
2020-10-30 13:41 ` Lee Shawn C [this message]
2020-10-30 17:35 ` [Intel-gfx] [PATCH v2] " Matt Roper
2020-10-31 2:55 ` Lee, Shawn C
2020-11-02 6:12 ` Matt Roper
2020-11-02 13:37 ` Lee, Shawn C
2020-10-30 16:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/rkl: new rkl ddc map for different PCH (rev2) Patchwork
2020-10-30 16:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-30 19:34 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-11-02 13:56 ` [Intel-gfx] [PATCH v3] drm/i915/rkl: new rkl ddc map for different PCH Lee Shawn C
2020-11-10 15:17 ` Lee, Shawn C
2020-11-12 23:53 ` Matt Roper
2020-11-13 0:14 ` Lee, Shawn C
2020-11-02 14:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/rkl: new rkl ddc map for different PCH (rev3) Patchwork
2020-11-02 14:31 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-11-17 14:19 ` [Intel-gfx] [PATCH v4] drm/i915/rkl: new rkl ddc map for different PCH Lee Shawn C
2020-11-17 14:26 ` [Intel-gfx] [PATCH v5] " Lee Shawn C
2020-11-19 23:51 ` Matt Roper
2020-11-20 2:21 ` Lee, Shawn C
2020-12-17 7:48 ` Timo Aaltonen
2020-11-17 23:10 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/rkl: new rkl ddc map for different PCH (rev5) Patchwork
2020-11-18 4:08 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201030134137.30867-1-shawn.c.lee@intel.com \
--to=shawn.c.lee@intel.com \
--cc=cooper.chiou@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).