From: Anshuman Gupta <anshuman.gupta@intel.com>
To: Ramalingam C <ramalingam.c@intel.com>
Cc: jani.nikula@intel.com, intel-gfx@lists.freedesktop.org,
dri-devel@lists.freedesktop.org, seanpaul@chromium.org
Subject: Re: [Intel-gfx] [PATCH v4 08/16] drm/i915/hdcp: Pass dig_port to intel_hdcp_init
Date: Fri, 6 Nov 2020 10:20:35 +0530 [thread overview]
Message-ID: <20201106045034.GQ29526@intel.com> (raw)
In-Reply-To: <20201105163912.GL3242@intel.com>
On 2020-11-05 at 22:09:12 +0530, Ramalingam C wrote:
> On 2020-10-27 at 22:12:00 +0530, Anshuman Gupta wrote:
> > Pass dig_port as an argument to intel_hdcp_init()
> > and intel_hdcp2_init().
> > This will be required for HDCP 2.2 stream encryption.
> >
> > Cc: Ramalingam C <ramalingam.c@intel.com>
> > Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 4 ++--
> > drivers/gpu/drm/i915/display/intel_hdcp.c | 12 +++++++-----
> > drivers/gpu/drm/i915/display/intel_hdcp.h | 4 +++-
> > drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
> > 4 files changed, 13 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > index 6dcbfaffd2c5..591b68e5de48 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > @@ -751,10 +751,10 @@ int intel_dp_init_hdcp(struct intel_digital_port *dig_port,
> > return 0;
> >
> > if (intel_connector->mst_port)
> > - return intel_hdcp_init(intel_connector, port,
> > + return intel_hdcp_init(intel_connector, dig_port,
> cant we retrieve the dig_port from connector?
No, actually intel_hdcp_init get called for DP MST in atomic check phase,
in atomic check phase DP MST connector->encoder is not initialize yet,
it initialize with DP MST encoder in commit phase.
so using intel_attached_dig_port(connector) results in OOPS in intel_hdcp_init().
Thanks,
Anshuman Gupta.
>
> -Ram
> > &intel_dp_mst_hdcp_shim);
> > else if (!intel_dp_is_edp(intel_dp))
> > - return intel_hdcp_init(intel_connector, port,
> > + return intel_hdcp_init(intel_connector, dig_port,
> > &intel_dp_hdcp_shim);
> >
> > return 0;
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > index 937af4aeaac2..b0f47687bc59 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > @@ -1982,12 +1982,13 @@ static enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder)
> > }
> >
> > static int initialize_hdcp_port_data(struct intel_connector *connector,
> > - enum port port,
> > + struct intel_digital_port *dig_port,
> > const struct intel_hdcp_shim *shim)
> > {
> > struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> > struct intel_hdcp *hdcp = &connector->hdcp;
> > struct hdcp_port_data *data = &hdcp->port_data;
> > + enum port port = dig_port->base.port;
> >
> > if (INTEL_GEN(dev_priv) < 12)
> > data->fw_ddi = intel_get_mei_fw_ddi_index(port);
> > @@ -2060,14 +2061,15 @@ void intel_hdcp_component_init(struct drm_i915_private *dev_priv)
> > }
> > }
> >
> > -static void intel_hdcp2_init(struct intel_connector *connector, enum port port,
> > +static void intel_hdcp2_init(struct intel_connector *connector,
> > + struct intel_digital_port *dig_port,
> > const struct intel_hdcp_shim *shim)
> > {
> > struct drm_i915_private *i915 = to_i915(connector->base.dev);
> > struct intel_hdcp *hdcp = &connector->hdcp;
> > int ret;
> >
> > - ret = initialize_hdcp_port_data(connector, port, shim);
> > + ret = initialize_hdcp_port_data(connector, dig_port, shim);
> > if (ret) {
> > drm_dbg_kms(&i915->drm, "Mei hdcp data init failed\n");
> > return;
> > @@ -2077,7 +2079,7 @@ static void intel_hdcp2_init(struct intel_connector *connector, enum port port,
> > }
> >
> > int intel_hdcp_init(struct intel_connector *connector,
> > - enum port port,
> > + struct intel_digital_port *dig_port,
> > const struct intel_hdcp_shim *shim)
> > {
> > struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> > @@ -2088,7 +2090,7 @@ int intel_hdcp_init(struct intel_connector *connector,
> > return -EINVAL;
> >
> > if (is_hdcp2_supported(dev_priv) && !connector->mst_port)
> > - intel_hdcp2_init(connector, port, shim);
> > + intel_hdcp2_init(connector, dig_port, shim);
> >
> > ret =
> > drm_connector_attach_content_protection_property(&connector->base,
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
> > index b912a3a0f5b8..8f53b0c7fe5c 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdcp.h
> > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
> > @@ -18,13 +18,15 @@ struct intel_connector;
> > struct intel_crtc_state;
> > struct intel_encoder;
> > struct intel_hdcp_shim;
> > +struct intel_digital_port;
> > enum port;
> > enum transcoder;
> >
> > void intel_hdcp_atomic_check(struct drm_connector *connector,
> > struct drm_connector_state *old_state,
> > struct drm_connector_state *new_state);
> > -int intel_hdcp_init(struct intel_connector *connector, enum port port,
> > +int intel_hdcp_init(struct intel_connector *connector,
> > + struct intel_digital_port *dig_port,
> > const struct intel_hdcp_shim *hdcp_shim);
> > int intel_hdcp_enable(struct intel_connector *connector,
> > const struct intel_crtc_state *pipe_config, u8 content_type);
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> > index f58469226694..0788de04711b 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> > @@ -3302,7 +3302,7 @@ void intel_hdmi_init_connector(struct intel_digital_port *dig_port,
> > intel_hdmi->attached_connector = intel_connector;
> >
> > if (is_hdcp_supported(dev_priv, port)) {
> > - int ret = intel_hdcp_init(intel_connector, port,
> > + int ret = intel_hdcp_init(intel_connector, dig_port,
> > &intel_hdmi_hdcp_shim);
> > if (ret)
> > drm_dbg_kms(&dev_priv->drm,
> > --
> > 2.26.2
> >
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next prev parent reply other threads:[~2020-11-06 5:04 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-27 16:41 [Intel-gfx] [PATCH v4 00/16] HDCP 2.2 and HDCP 1.4 Gen12 DP MST support Anshuman Gupta
2020-10-27 16:41 ` [Intel-gfx] [PATCH v4 01/16] drm/i915/hdcp: Update CP property in update_pipe Anshuman Gupta
2020-11-02 7:45 ` Shankar, Uma
2020-11-05 13:18 ` Ramalingam C
2020-11-05 13:21 ` Ramalingam C
2020-11-05 13:26 ` Ramalingam C
2020-10-27 16:41 ` [Intel-gfx] [PATCH v4 02/16] drm/i915/hdcp: Get conn while content_type changed Anshuman Gupta
2020-11-02 7:45 ` Shankar, Uma
2020-11-05 13:23 ` Ramalingam C
2020-10-27 16:41 ` [Intel-gfx] [PATCH v4 03/16] drm/i915/hotplug: Handle CP_IRQ for DP-MST Anshuman Gupta
2020-11-06 12:00 ` Ramalingam C
2020-10-27 16:41 ` [Intel-gfx] [PATCH v4 04/16] drm/i915/hdcp: DP MST transcoder for link and stream Anshuman Gupta
2020-11-05 13:52 ` Ramalingam C
2020-10-27 16:41 ` [Intel-gfx] [PATCH v4 05/16] drm/i915/hdcp: Move HDCP enc status timeout to header Anshuman Gupta
2020-11-05 13:57 ` Ramalingam C
2020-10-27 16:41 ` [Intel-gfx] [PATCH v4 06/16] drm/i915/hdcp: HDCP stream encryption support Anshuman Gupta
2020-11-02 7:47 ` Shankar, Uma
2020-11-05 15:34 ` Ramalingam C
2020-11-06 5:22 ` Anshuman Gupta
2020-11-06 7:52 ` Ramalingam C
2020-10-27 16:41 ` [Intel-gfx] [PATCH v4 07/16] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support Anshuman Gupta
2020-11-02 7:47 ` Shankar, Uma
2020-11-05 15:41 ` Ramalingam C
2020-11-06 6:36 ` Anshuman Gupta
2020-10-27 16:42 ` [Intel-gfx] [PATCH v4 08/16] drm/i915/hdcp: Pass dig_port to intel_hdcp_init Anshuman Gupta
2020-11-05 16:39 ` Ramalingam C
2020-11-06 4:50 ` Anshuman Gupta [this message]
2020-11-06 7:48 ` Ramalingam C
2020-10-27 16:42 ` [Intel-gfx] [PATCH v4 09/16] drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port Anshuman Gupta
2020-11-06 11:34 ` Ramalingam C
2020-10-27 16:42 ` [Intel-gfx] [PATCH v4 10/16] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len Anshuman Gupta
2020-11-05 16:07 ` Ramalingam C
2020-10-27 16:42 ` [Intel-gfx] [PATCH v4 11/16] drm/hdcp: Max MST content streams Anshuman Gupta
2020-11-05 16:09 ` Ramalingam C
2020-10-27 16:42 ` [Intel-gfx] [PATCH v4 12/16] drm/i915/hdcp: MST streams support in hdcp port_data Anshuman Gupta
2020-11-02 7:49 ` Shankar, Uma
2020-11-05 16:34 ` Ramalingam C
2020-11-06 6:35 ` Anshuman Gupta
2020-11-06 11:28 ` Ramalingam C
2020-10-27 16:42 ` [Intel-gfx] [PATCH v4 13/16] drm/i915/hdcp: Pass connector to check_2_2_link Anshuman Gupta
2020-11-05 16:45 ` Ramalingam C
2020-11-06 5:08 ` Anshuman Gupta
2020-10-27 16:42 ` [Intel-gfx] [PATCH v4 14/16] drm/i915/hdcp: Add HDCP 2.2 stream register Anshuman Gupta
2020-11-05 16:47 ` Ramalingam C
2020-10-27 16:42 ` [Intel-gfx] [PATCH v4 15/16] drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks Anshuman Gupta
2020-11-02 7:49 ` Shankar, Uma
2020-11-03 6:27 ` Anshuman Gupta
2020-11-06 9:27 ` Ramalingam C
2020-11-06 11:12 ` Ramalingam C
2020-11-09 5:36 ` Anshuman Gupta
2020-11-09 8:38 ` Ramalingam C
2020-10-27 16:42 ` [Intel-gfx] [PATCH v4 16/16] drm/i915/hdcp: Enable HDCP 2.2 MST support Anshuman Gupta
2020-11-06 11:58 ` Ramalingam C
2020-10-28 2:47 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for HDCP 2.2 and HDCP 1.4 Gen12 DP MST support (rev2) Patchwork
2020-10-28 2:49 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-28 3:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-28 6:40 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-10-29 8:37 ` Anshuman Gupta
2020-10-29 22:11 ` Vudum, Lakshminarayana
2020-10-29 17:40 ` Patchwork
2020-10-29 17:54 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2020-11-02 9:02 ` Anshuman Gupta
2020-11-03 7:05 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for HDCP 2.2 and HDCP 1.4 Gen12 DP MST support (rev3) Patchwork
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