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spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7B0756E45C; Tue, 24 Nov 2020 15:50:02 +0000 (UTC) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id ADA6A6E453; Tue, 24 Nov 2020 15:50:00 +0000 (UTC) IronPort-SDR: cpWCsGQbS1whqsGj6vyzbub8msXDVRNgVOoqmFDw6vjs+MYvPcxWdXgVrrLtArBHUS+aIQ19eS DqwYnftCMZQw== X-IronPort-AV: E=McAfee;i="6000,8403,9815"; a="151806768" X-IronPort-AV: E=Sophos;i="5.78,366,1599548400"; d="scan'208";a="151806768" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Nov 2020 07:50:00 -0800 IronPort-SDR: uukol10vZ3/84iSGEtI/4Ge+knvbmS2AgzM3MY6bD35NlsfndOW9MvSf5MzVeic0H2R4KpKub1 hUX86Mgn8JJg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,366,1599548400"; d="scan'208";a="332602260" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by orsmga006.jf.intel.com with SMTP; 24 Nov 2020 07:49:57 -0800 Received: by stinkbox (sSMTP sendmail emulation); Tue, 24 Nov 2020 17:49:56 +0200 Date: Tue, 24 Nov 2020 17:49:56 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Hans de Goede Message-ID: <20201124154956.GL6112@intel.com> References: <20201118124058.26021-1-hdegoede@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201118124058.26021-1-hdegoede@redhat.com> X-Patchwork-Hint: comment User-Agent: Mutt/1.10.1 (2018-07-13) Subject: Re: [Intel-gfx] [PATCH] drm/i915/dsi: Use unconditional msleep for the panel_on_delay when there is no reset-deassert MIPI-sequence X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx , dri-devel@lists.freedesktop.org Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Wed, Nov 18, 2020 at 01:40:58PM +0100, Hans de Goede wrote: > Commit 25b4620ee822 ("drm/i915/dsi: Skip delays for v3 VBTs in vid-mode") > added an intel_dsi_msleep() helper which skips sleeping if the > MIPI-sequences have a version of 3 or newer and the panel is in vid-mode; > and it moved a bunch of msleep-s over to this new helper. > = > This was based on my reading of the big comment around line 730 which > starts with "Panel enable/disable sequences from the VBT spec.", > where the "v3 video mode seq" column does not have any wait t# entries. > = > Given that this code has been used on a lot of different devices without > issues until now, it seems that my interpretation of the spec here is > mostly correct. > = > But now I have encountered one device, an Acer Aspire Switch 10 E > SW3-016, where the panel will not light up unless we do actually honor the > panel_on_delay after exexuting the MIPI_SEQ_PANEL_ON sequence. > = > What seems to set this model apart is that it is lacking a > MIPI_SEQ_DEASSERT_RESET sequence, which is where the power-on > delay usually happens. > = > Fix the panel not lighting up on this model by using an unconditional > msleep(panel_on_delay) instead of intel_dsi_msleep() when there is > no MIPI_SEQ_DEASSERT_RESET sequence. > = > Fixes: 25b4620ee822 ("drm/i915/dsi: Skip delays for v3 VBTs in vid-mode") > Signed-off-by: Hans de Goede > --- > drivers/gpu/drm/i915/display/vlv_dsi.c | 10 +++++++--- > 1 file changed, 7 insertions(+), 3 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i91= 5/display/vlv_dsi.c > index 194c239ab6b1..ef673277b36d 100644 > --- a/drivers/gpu/drm/i915/display/vlv_dsi.c > +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c > @@ -816,10 +816,14 @@ static void intel_dsi_pre_enable(struct intel_atomi= c_state *state, > intel_dsi_prepare(encoder, pipe_config); > = > intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_POWER_ON); > - intel_dsi_msleep(intel_dsi, intel_dsi->panel_on_delay); > = > - /* Deassert reset */ > - intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET); > + if (dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) { > + intel_dsi_msleep(intel_dsi, intel_dsi->panel_on_delay); > + /* Deassert reset */ > + intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET); > + } else { > + msleep(intel_dsi->panel_on_delay); > + } Could perhaps use a comment ot explain to the reader what's going on. Looks sane enough to me, and if we get this wrong we just get a bigger delay than necessary I guess. So mostly harmless. Reviewed-by: Ville Syrj=E4l=E4 > = > if (IS_GEMINILAKE(dev_priv)) { > glk_cold_boot =3D glk_dsi_enable_io(encoder); > -- = > 2.28.0 -- = Ville Syrj=E4l=E4 Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx