From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [v12 15/15] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON
Date: Fri, 27 Nov 2020 02:33:14 +0530 [thread overview]
Message-ID: <20201126210314.7882-16-uma.shankar@intel.com> (raw)
In-Reply-To: <20201126210314.7882-1-uma.shankar@intel.com>
Blanking needs to be reduced to incorporate DP and HDMI timing/link
bandwidth limitations for CEA modes (4k@60 at 10 bpp). DP can drive
17.28Gbs while 4k modes (VIC97 etc) at 10 bpp required 17.8 Gbps.
This will cause mode to blank out. Reduced Htotal by shortening the
back porch and front porch within permissible limits.
Note: This is for reference for userspace, not to be merged in kernel.
v2: This is marked as Not for merge and the responsibilty to program
these custom timings will be on userspace. This patch is just for
reference purposes. This is based on Ville's recommendation.
v3: updated commit message.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 0f89dbfa958a..f6f66033176b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -741,8 +741,10 @@ intel_dp_mode_valid(struct drm_connector *connector,
{
struct intel_dp *intel_dp = intel_attached_dp(to_intel_connector(connector));
struct intel_connector *intel_connector = to_intel_connector(connector);
+ struct intel_encoder *intel_encoder = intel_attached_encoder(intel_connector);
struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
struct drm_i915_private *dev_priv = to_i915(connector->dev);
+ struct intel_lspcon *lspcon = enc_to_intel_lspcon(intel_encoder);
int target_clock = mode->clock;
int max_rate, mode_rate, max_lanes, max_link_clock;
int max_dotclk = dev_priv->max_dotclk_freq;
@@ -778,6 +780,21 @@ intel_dp_mode_valid(struct drm_connector *connector,
if (target_clock > max_dotclk)
return MODE_CLOCK_HIGH;
+ /*
+ * Reducing Blanking to incorporate DP and HDMI timing/link bandwidth
+ * limitations for CEA modes (4k@60 at 10 bpp). DP can drive 17.28Gbs
+ * while 4k modes (VIC97 etc) at 10 bpp required 17.8 Gbps. This will
+ * cause mode to blank out. Reduced Htotal by shortening the back porch
+ * and front porch within permissible limits.
+ */
+ if (lspcon->active && lspcon->hdr_supported &&
+ mode->clock > 570000) {
+ mode->clock = 570000;
+ mode->htotal -= 180;
+ mode->hsync_start -= 72;
+ mode->hsync_end -= 72;
+ }
+
max_link_clock = intel_dp_max_link_rate(intel_dp);
max_lanes = intel_dp_max_lane_count(intel_dp);
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-11-26 20:30 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-26 21:02 [Intel-gfx] [v12 00/15] Enable HDR on MCA LSPCON based Gen9 devices Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 01/15] drm/i915/display: Add HDR Capability detection for LSPCON Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 02/15] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 03/15] drm/i915/display: Attach HDR property for capable Gen9 devices Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 04/15] drm/i915/display: Fixes quantization range for YCbCr output Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 05/15] drm/i915/display: Add a WARN for invalid output range and format Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 06/15] drm/i915/display: Attach content type property for LSPCON Uma Shankar
2020-11-27 14:27 ` [Intel-gfx] [v13 " Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 07/15] drm/i915: Split intel_attach_colorspace_property() into HDMI vs. DP variants Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 08/15] drm/i915/display: Enable colorspace programming for LSPCON devices Uma Shankar
2020-11-27 13:45 ` Ville Syrjälä
2020-11-27 14:03 ` Shankar, Uma
2020-11-27 14:28 ` [Intel-gfx] [v13 " Uma Shankar
2020-11-30 19:51 ` Ville Syrjälä
2020-11-30 20:17 ` Shankar, Uma
2020-11-26 21:03 ` [Intel-gfx] [v12 09/15] drm/i915/display: Nuke bogus lspcon check Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 10/15] drm/i915/display: Enable HDR for Parade based lspcon Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 11/15] drm/i915/lspcon: Create separate infoframe_enabled helper Uma Shankar
2020-11-27 14:55 ` Ville Syrjälä
2020-11-30 12:16 ` Shankar, Uma
2020-11-26 21:03 ` [Intel-gfx] [v12 12/15] drm/i915/display: Implement infoframes readback for LSPCON Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 13/15] drm/i915/display: Implement DRM infoframe read " Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 14/15] drm/i915/lspcon: Do not send DRM infoframes to non-HDMI sinks Uma Shankar
2020-11-27 14:52 ` Ville Syrjälä
2020-11-30 12:35 ` Shankar, Uma
2020-11-26 21:03 ` Uma Shankar [this message]
2020-11-30 11:13 ` [Intel-gfx] [v12 15/15] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON Shashank Sharma
2020-12-01 20:47 ` Shankar, Uma
2020-12-02 4:47 ` Shashank Sharma
2020-11-27 7:53 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev12) Patchwork
2020-11-27 7:54 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-27 8:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-27 9:34 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-11-27 16:32 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev14) Patchwork
2020-11-27 16:33 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-27 17:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-27 18:53 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201126210314.7882-16-uma.shankar@intel.com \
--to=uma.shankar@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).