From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [v12 01/15] drm/i915/display: Add HDR Capability detection for LSPCON
Date: Fri, 27 Nov 2020 02:33:00 +0530 [thread overview]
Message-ID: <20201126210314.7882-2-uma.shankar@intel.com> (raw)
In-Reply-To: <20201126210314.7882-1-uma.shankar@intel.com>
LSPCON firmware exposes HDR capability through LPCON_CAPABILITIES
DPCD register. LSPCON implementations capable of supporting
HDR set HDR_CAPABILITY bit in LSPCON_CAPABILITIES to 1. This patch
reads the same, detects the HDR capability and adds this to
intel_lspcon struct.
v2: Addressed Jani Nikula's review comment and fixed the HDR
capability detection logic
v3: Deferred HDR detection from lspcon_init (Ville)
v4: Addressed Ville's minor review comments, added his RB.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_lspcon.c | 27 +++++++++++++++++++
drivers/gpu/drm/i915/display/intel_lspcon.h | 1 +
3 files changed, 29 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index ce82d654d0f2..5a949218dd3a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1450,6 +1450,7 @@ enum lspcon_vendor {
struct intel_lspcon {
bool active;
+ bool hdr_supported;
enum drm_lspcon_mode mode;
enum lspcon_vendor vendor;
};
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index e37d45e531df..3065727015a7 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -35,6 +35,8 @@
#define LSPCON_VENDOR_PARADE_OUI 0x001CF8
#define LSPCON_VENDOR_MCA_OUI 0x0060AD
+#define DPCD_MCA_LSPCON_HDR_STATUS 0x70003
+
/* AUX addresses to write MCA AVI IF */
#define LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0
#define LSPCON_MCA_AVI_IF_CTRL 0x5DF
@@ -104,6 +106,31 @@ static bool lspcon_detect_vendor(struct intel_lspcon *lspcon)
return true;
}
+void lspcon_detect_hdr_capability(struct intel_lspcon *lspcon)
+{
+ struct intel_digital_port *dig_port =
+ container_of(lspcon, struct intel_digital_port, lspcon);
+ struct drm_device *dev = dig_port->base.base.dev;
+ struct intel_dp *dp = lspcon_to_intel_dp(lspcon);
+ u8 hdr_caps;
+ int ret;
+
+ /* Enable HDR for MCA based LSPCON devices */
+ if (lspcon->vendor == LSPCON_VENDOR_MCA)
+ ret = drm_dp_dpcd_read(&dp->aux, DPCD_MCA_LSPCON_HDR_STATUS,
+ &hdr_caps, 1);
+ else
+ return;
+
+ if (ret < 0) {
+ drm_dbg_kms(dev, "HDR capability detection failed\n");
+ lspcon->hdr_supported = false;
+ } else if (hdr_caps & 0x1) {
+ drm_dbg_kms(dev, "LSPCON capable of HDR\n");
+ lspcon->hdr_supported = true;
+ }
+}
+
static enum drm_lspcon_mode lspcon_get_current_mode(struct intel_lspcon *lspcon)
{
enum drm_lspcon_mode current_mode;
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h
index b03dcb7076d8..a19b3564c635 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.h
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.h
@@ -15,6 +15,7 @@ struct intel_digital_port;
struct intel_encoder;
struct intel_lspcon;
+void lspcon_detect_hdr_capability(struct intel_lspcon *lspcon);
void lspcon_resume(struct intel_digital_port *dig_port);
void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon);
void lspcon_write_infoframe(struct intel_encoder *encoder,
--
2.26.2
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next prev parent reply other threads:[~2020-11-26 20:29 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-26 21:02 [Intel-gfx] [v12 00/15] Enable HDR on MCA LSPCON based Gen9 devices Uma Shankar
2020-11-26 21:03 ` Uma Shankar [this message]
2020-11-26 21:03 ` [Intel-gfx] [v12 02/15] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 03/15] drm/i915/display: Attach HDR property for capable Gen9 devices Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 04/15] drm/i915/display: Fixes quantization range for YCbCr output Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 05/15] drm/i915/display: Add a WARN for invalid output range and format Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 06/15] drm/i915/display: Attach content type property for LSPCON Uma Shankar
2020-11-27 14:27 ` [Intel-gfx] [v13 " Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 07/15] drm/i915: Split intel_attach_colorspace_property() into HDMI vs. DP variants Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 08/15] drm/i915/display: Enable colorspace programming for LSPCON devices Uma Shankar
2020-11-27 13:45 ` Ville Syrjälä
2020-11-27 14:03 ` Shankar, Uma
2020-11-27 14:28 ` [Intel-gfx] [v13 " Uma Shankar
2020-11-30 19:51 ` Ville Syrjälä
2020-11-30 20:17 ` Shankar, Uma
2020-11-26 21:03 ` [Intel-gfx] [v12 09/15] drm/i915/display: Nuke bogus lspcon check Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 10/15] drm/i915/display: Enable HDR for Parade based lspcon Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 11/15] drm/i915/lspcon: Create separate infoframe_enabled helper Uma Shankar
2020-11-27 14:55 ` Ville Syrjälä
2020-11-30 12:16 ` Shankar, Uma
2020-11-26 21:03 ` [Intel-gfx] [v12 12/15] drm/i915/display: Implement infoframes readback for LSPCON Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 13/15] drm/i915/display: Implement DRM infoframe read " Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 14/15] drm/i915/lspcon: Do not send DRM infoframes to non-HDMI sinks Uma Shankar
2020-11-27 14:52 ` Ville Syrjälä
2020-11-30 12:35 ` Shankar, Uma
2020-11-26 21:03 ` [Intel-gfx] [v12 15/15] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON Uma Shankar
2020-11-30 11:13 ` Shashank Sharma
2020-12-01 20:47 ` Shankar, Uma
2020-12-02 4:47 ` Shashank Sharma
2020-11-27 7:53 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev12) Patchwork
2020-11-27 7:54 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-27 8:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-27 9:34 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-11-27 16:32 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev14) Patchwork
2020-11-27 16:33 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-27 17:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-27 18:53 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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