intel-gfx.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [v12 02/15] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon
Date: Fri, 27 Nov 2020 02:33:01 +0530	[thread overview]
Message-ID: <20201126210314.7882-3-uma.shankar@intel.com> (raw)
In-Reply-To: <20201126210314.7882-1-uma.shankar@intel.com>

Gen9 hardware supports HDMI2.0 through LSPCON chips.
Extending HDR support for MCA LSPCON based GEN9 devices.

SOC will drive LSPCON as DP and send HDR metadata as standard
DP SDP packets. LSPCON will be set to operate in PCON mode,
will receive the metadata and create Dynamic Range and
Mastering Infoframe (DRM packets) and send it to HDR capable
HDMI sink devices.

v2: Re-used hsw infoframe write implementation for HDR metadata
for LSPCON as per Ville's suggestion.

v3: Addressed Jani Nikula's review comments.

v4: Addressed Ville's review comments, removed redundant wrapper
and checks, passed arguments instead of hardcodings.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c   |  8 +++---
 drivers/gpu/drm/i915/display/intel_lspcon.c | 31 ++++++++++++---------
 drivers/gpu/drm/i915/display/intel_lspcon.h |  4 +++
 3 files changed, 26 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 82674a8853c6..0f2cc40cc792 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -518,10 +518,10 @@ static u32 vlv_infoframes_enabled(struct intel_encoder *encoder,
 		      VIDEO_DIP_ENABLE_SPD | VIDEO_DIP_ENABLE_GCP);
 }
 
-static void hsw_write_infoframe(struct intel_encoder *encoder,
-				const struct intel_crtc_state *crtc_state,
-				unsigned int type,
-				const void *frame, ssize_t len)
+void hsw_write_infoframe(struct intel_encoder *encoder,
+			 const struct intel_crtc_state *crtc_state,
+			 unsigned int type,
+			 const void *frame, ssize_t len)
 {
 	const u32 *data = frame;
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index 3065727015a7..641025f00286 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -445,27 +445,32 @@ void lspcon_write_infoframe(struct intel_encoder *encoder,
 			    unsigned int type,
 			    const void *frame, ssize_t len)
 {
-	bool ret;
+	bool ret = true;
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
 
-	/* LSPCON only needs AVI IF */
-	if (type != HDMI_INFOFRAME_TYPE_AVI)
+	switch (type) {
+	case HDMI_INFOFRAME_TYPE_AVI:
+		if (lspcon->vendor == LSPCON_VENDOR_MCA)
+			ret = _lspcon_write_avi_infoframe_mca(&intel_dp->aux,
+							      frame, len);
+		else
+			ret = _lspcon_write_avi_infoframe_parade(&intel_dp->aux,
+								 frame, len);
+		break;
+	case HDMI_PACKET_TYPE_GAMUT_METADATA:
+		drm_dbg_kms(encoder->base.dev, "Update HDR metadata for lspcon\n");
+		/* It uses the legacy hsw implementation for the same */
+		hsw_write_infoframe(encoder, crtc_state, type, frame, len);
+		break;
+	default:
 		return;
-
-	if (lspcon->vendor == LSPCON_VENDOR_MCA)
-		ret = _lspcon_write_avi_infoframe_mca(&intel_dp->aux,
-						      frame, len);
-	else
-		ret = _lspcon_write_avi_infoframe_parade(&intel_dp->aux,
-							 frame, len);
+	}
 
 	if (!ret) {
-		DRM_ERROR("Failed to write AVI infoframes\n");
+		DRM_ERROR("Failed to write infoframes\n");
 		return;
 	}
-
-	DRM_DEBUG_DRIVER("AVI infoframes updated successfully\n");
 }
 
 void lspcon_read_infoframe(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h
index a19b3564c635..98043ba50dd4 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.h
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.h
@@ -32,5 +32,9 @@ void lspcon_set_infoframes(struct intel_encoder *encoder,
 			   const struct drm_connector_state *conn_state);
 u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
 			      const struct intel_crtc_state *pipe_config);
+void hsw_write_infoframe(struct intel_encoder *encoder,
+			 const struct intel_crtc_state *crtc_state,
+			 unsigned int type,
+			 const void *frame, ssize_t len);
 
 #endif /* __INTEL_LSPCON_H__ */
-- 
2.26.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2020-11-26 20:29 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-26 21:02 [Intel-gfx] [v12 00/15] Enable HDR on MCA LSPCON based Gen9 devices Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 01/15] drm/i915/display: Add HDR Capability detection for LSPCON Uma Shankar
2020-11-26 21:03 ` Uma Shankar [this message]
2020-11-26 21:03 ` [Intel-gfx] [v12 03/15] drm/i915/display: Attach HDR property for capable Gen9 devices Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 04/15] drm/i915/display: Fixes quantization range for YCbCr output Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 05/15] drm/i915/display: Add a WARN for invalid output range and format Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 06/15] drm/i915/display: Attach content type property for LSPCON Uma Shankar
2020-11-27 14:27   ` [Intel-gfx] [v13 " Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 07/15] drm/i915: Split intel_attach_colorspace_property() into HDMI vs. DP variants Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 08/15] drm/i915/display: Enable colorspace programming for LSPCON devices Uma Shankar
2020-11-27 13:45   ` Ville Syrjälä
2020-11-27 14:03     ` Shankar, Uma
2020-11-27 14:28   ` [Intel-gfx] [v13 " Uma Shankar
2020-11-30 19:51     ` Ville Syrjälä
2020-11-30 20:17       ` Shankar, Uma
2020-11-26 21:03 ` [Intel-gfx] [v12 09/15] drm/i915/display: Nuke bogus lspcon check Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 10/15] drm/i915/display: Enable HDR for Parade based lspcon Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 11/15] drm/i915/lspcon: Create separate infoframe_enabled helper Uma Shankar
2020-11-27 14:55   ` Ville Syrjälä
2020-11-30 12:16     ` Shankar, Uma
2020-11-26 21:03 ` [Intel-gfx] [v12 12/15] drm/i915/display: Implement infoframes readback for LSPCON Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 13/15] drm/i915/display: Implement DRM infoframe read " Uma Shankar
2020-11-26 21:03 ` [Intel-gfx] [v12 14/15] drm/i915/lspcon: Do not send DRM infoframes to non-HDMI sinks Uma Shankar
2020-11-27 14:52   ` Ville Syrjälä
2020-11-30 12:35     ` Shankar, Uma
2020-11-26 21:03 ` [Intel-gfx] [v12 15/15] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON Uma Shankar
2020-11-30 11:13   ` Shashank Sharma
2020-12-01 20:47     ` Shankar, Uma
2020-12-02  4:47       ` Shashank Sharma
2020-11-27  7:53 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev12) Patchwork
2020-11-27  7:54 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-27  8:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-27  9:34 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-11-27 16:32 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev14) Patchwork
2020-11-27 16:33 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-27 17:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-27 18:53 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20201126210314.7882-3-uma.shankar@intel.com \
    --to=uma.shankar@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).