From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3450C64E7B for ; Tue, 1 Dec 2020 17:17:25 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 84730206E0 for ; Tue, 1 Dec 2020 17:17:25 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 84730206E0 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CC95D6E560; Tue, 1 Dec 2020 17:17:24 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id B96306E560 for ; Tue, 1 Dec 2020 17:17:23 +0000 (UTC) IronPort-SDR: 73pdnIXzCkZE1fQ+J+INzwDNqD7PFPcY2dD9ZHnkspjEGzpqYqxRP28YWGM1Narqat50eB4NsR PZGZM/GYwT2g== X-IronPort-AV: E=McAfee;i="6000,8403,9822"; a="159924359" X-IronPort-AV: E=Sophos;i="5.78,384,1599548400"; d="scan'208";a="159924359" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Dec 2020 09:17:21 -0800 IronPort-SDR: TX2GYlUviy9kds7aU+0DkYqVo6U6bdFyFwcbsO1gcj8H1eFimH6hwlhzDwy54vfA8XnwXs7aBb 2EAykGeTK2tQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,384,1599548400"; d="scan'208";a="434740577" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by fmsmga001.fm.intel.com with SMTP; 01 Dec 2020 09:17:18 -0800 Received: by stinkbox (sSMTP sendmail emulation); Tue, 01 Dec 2020 19:17:17 +0200 Date: Tue, 1 Dec 2020 19:17:17 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: "Navare, Manasi" Message-ID: <20201201171717.GB6112@intel.com> References: <20201124201156.17095-1-ville.syrjala@linux.intel.com> <20201130225358.GD17815@labuser-Z97X-UD5H> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201130225358.GD17815@labuser-Z97X-UD5H> X-Patchwork-Hint: comment User-Agent: Mutt/1.10.1 (2018-07-13) Subject: Re: [Intel-gfx] [PATCH 1/4] drm/i915: Track logically enabled planes for hw state X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Mon, Nov 30, 2020 at 02:53:58PM -0800, Navare, Manasi wrote: > On Tue, Nov 24, 2020 at 10:11:53PM +0200, Ville Syrjala wrote: > > From: Ville Syrj=E4l=E4 > > = > > Currently crtc_state->uapi.plane_mask only tracks logically > > enabled planes on the uapi level. For bigjoiner purposes > > we want to do the same for the hw state. Let's follow the > > pattern established by active_planes & co. here. > > = > > Signed-off-by: Ville Syrj=E4l=E4 > > --- > > drivers/gpu/drm/i915/display/intel_atomic_plane.c | 3 +++ > > drivers/gpu/drm/i915/display/intel_display.c | 13 +++++++++---- > > drivers/gpu/drm/i915/display/intel_display_types.h | 5 ++++- > > 3 files changed, 16 insertions(+), 5 deletions(-) > > = > > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/driver= s/gpu/drm/i915/display/intel_atomic_plane.c > > index 7e9f84b00859..b5e1ee99535c 100644 > > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c > > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c > > @@ -312,10 +312,13 @@ int intel_plane_atomic_check_with_state(const str= uct intel_crtc_state *old_crtc_ > > int ret; > > = > > intel_plane_set_invisible(new_crtc_state, new_plane_state); > > + new_crtc_state->enabled_planes &=3D ~BIT(plane->id); > = > Why not just add this a part of the intel_plane_set_invisible() function = and may be rename that > to indicate invisible and disable? Because visible vs. logically enabled are two different things, which is the whole point of this new bitmask. If we just cared about visible vs. invisible we wouldn't need anything beyond active_planes. > = > Not a hard and fast requirement just a suggestion but in either case > = > Reviewed-by: Manasi Navare > = > Manasi > = > > = > > if (!new_plane_state->hw.crtc && !old_plane_state->hw.crtc) > > return 0; > > = > > + new_crtc_state->enabled_planes |=3D BIT(plane->id); > > + > > ret =3D plane->check_plane(new_crtc_state, new_plane_state); > > if (ret) > > return ret; > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu= /drm/i915/display/intel_display.c > > index 595183f7b60f..068892e4d2f0 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display.c > > +++ b/drivers/gpu/drm/i915/display/intel_display.c > > @@ -3551,7 +3551,7 @@ intel_set_plane_visible(struct intel_crtc_state *= crtc_state, > > crtc_state->uapi.plane_mask &=3D ~drm_plane_mask(&plane->base); > > } > > = > > -static void fixup_active_planes(struct intel_crtc_state *crtc_state) > > +static void fixup_plane_bitmasks(struct intel_crtc_state *crtc_state) > > { > > struct drm_i915_private *dev_priv =3D to_i915(crtc_state->uapi.crtc->= dev); > > struct drm_plane *plane; > > @@ -3561,11 +3561,14 @@ static void fixup_active_planes(struct intel_cr= tc_state *crtc_state) > > * have been used on the same (or wrong) pipe. plane_mask uses > > * unique ids, hence we can use that to reconstruct active_planes. > > */ > > + crtc_state->enabled_planes =3D 0; > > crtc_state->active_planes =3D 0; > > = > > drm_for_each_plane_mask(plane, &dev_priv->drm, > > - crtc_state->uapi.plane_mask) > > + crtc_state->uapi.plane_mask) { > > + crtc_state->enabled_planes |=3D BIT(to_intel_plane(plane)->id); > > crtc_state->active_planes |=3D BIT(to_intel_plane(plane)->id); > > + } > > } > > = > > static void intel_plane_disable_noatomic(struct intel_crtc *crtc, > > @@ -3583,7 +3586,7 @@ static void intel_plane_disable_noatomic(struct i= ntel_crtc *crtc, > > crtc->base.base.id, crtc->base.name); > > = > > intel_set_plane_visible(crtc_state, plane_state, false); > > - fixup_active_planes(crtc_state); > > + fixup_plane_bitmasks(crtc_state); > > crtc_state->data_rate[plane->id] =3D 0; > > crtc_state->min_cdclk[plane->id] =3D 0; > > = > > @@ -12842,6 +12845,7 @@ static int icl_check_nv12_planes(struct intel_c= rtc_state *crtc_state) > > = > > plane_state->planar_linked_plane =3D NULL; > > if (plane_state->planar_slave && !plane_state->uapi.visible) { > > + crtc_state->enabled_planes &=3D ~BIT(plane->id); > > crtc_state->active_planes &=3D ~BIT(plane->id); > > crtc_state->update_planes |=3D BIT(plane->id); > > } > > @@ -12885,6 +12889,7 @@ static int icl_check_nv12_planes(struct intel_c= rtc_state *crtc_state) > > = > > linked_state->planar_slave =3D true; > > linked_state->planar_linked_plane =3D plane; > > + crtc_state->enabled_planes |=3D BIT(linked->id); > > crtc_state->active_planes |=3D BIT(linked->id); > > crtc_state->update_planes |=3D BIT(linked->id); > > drm_dbg_kms(&dev_priv->drm, "Using %s as Y plane for %s\n", > > @@ -19165,7 +19170,7 @@ static void readout_plane_state(struct drm_i915= _private *dev_priv) > > struct intel_crtc_state *crtc_state =3D > > to_intel_crtc_state(crtc->base.state); > > = > > - fixup_active_planes(crtc_state); > > + fixup_plane_bitmasks(crtc_state); > > } > > } > > = > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drive= rs/gpu/drm/i915/display/intel_display_types.h > > index ce82d654d0f2..c93cf3ddebb6 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > > @@ -1047,7 +1047,10 @@ struct intel_crtc_state { > > u32 cgm_mode; > > }; > > = > > - /* bitmask of visible planes (enum plane_id) */ > > + /* bitmask of logically enabled planes (enum plane_id) */ > > + u8 enabled_planes; > > + > > + /* bitmask of actually visible planes (enum plane_id) */ > > u8 active_planes; > > u8 nv12_planes; > > u8 c8_planes; > > -- = > > 2.26.2 > > = > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx