Re: [Intel-gfx] [PATCH 8/8] drm/i915/fbc: Allow higher compression limits on FBC1

Juha-Pekka Heikkilä
2021-08-23T17:52:55Z

Look ok to me.

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

On 2.7.2021 23.46, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> On FBC1 we can specify an arbitrary cfb stride. The hw will
> simply throw away any compressed line that would exceed the
> specified limit and keep using the uncompressed data instead.
> Thus we can allow arbitrary compression limits.
>
> The one thing we have to keep in mind though is that the cfb
> stride is specified in units of 32B (gen2) or 64B (gen3+).
> Fortunately X-tile is already 128B (gen2) or 512B (gen3+) wide
> so as long as we limit outselves to the same 4x compression
> limit that FBC2 has we are guaranteed to have a sufficiently
> aligned cfb stride.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 20 +++++++-------------
> 1 file changed, 7 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index daf2191dd3f6..d46ee7b49d68 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -144,15 +144,13 @@ static void i8xx_fbc_deactivate(struct drm_i915_private *dev_priv)
>
> static void i8xx_fbc_activate(struct drm_i915_private *dev_priv)
> {
> - struct intel_fbc_reg_params *params = &dev_priv->fbc.params;
> + struct intel_fbc *fbc = &dev_priv->fbc;
> + const struct intel_fbc_reg_params *params = &fbc->params;
> int cfb_pitch;
> int i;
> u32 fbc_ctl;
>
> - /* Note: fbc.limit == 1 for i8xx */
> - cfb_pitch = params->cfb_size / FBC_LL_SIZE;
> - if (params->fb.stride < cfb_pitch)
> - cfb_pitch = params->fb.stride;
> + cfb_pitch = params->cfb_stride / fbc->limit;
>
> /* FBC_CTL wants 32B or 64B units */
> if (DISPLAY_VER(dev_priv) == 2)
> @@ -498,18 +496,14 @@ static int intel_fbc_min_limit(int fb_cpp)
>
> static int intel_fbc_max_limit(struct drm_i915_private *dev_priv)
> {
> - /*
> - * FIXME: FBC1 can have arbitrary cfb stride,
> - * so we could support different compression ratios.
> - */
> - if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
> - return 1;
> -
> /* WaFbcOnly1to1Ratio:ctg */
> if (IS_G4X(dev_priv))
> return 1;
>
> - /* FBC2 can only do 1:1, 1:2, 1:4 */
> + /*
> + * FBC2 can only do 1:1, 1:2, 1:4, we limit
> + * FBC1 to the same out of convenience.
> + */
> return 4;
> }
>
>
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