From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BCAE8C07E96 for ; Thu, 8 Jul 2021 12:26:48 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7E3B16135C for ; Thu, 8 Jul 2021 12:26:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7E3B16135C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E87126E8C3; Thu, 8 Jul 2021 12:26:45 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4EC166E8BE; Thu, 8 Jul 2021 12:26:44 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10038"; a="273334412" X-IronPort-AV: E=Sophos;i="5.84,222,1620716400"; d="scan'208";a="273334412" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jul 2021 05:26:44 -0700 X-IronPort-AV: E=Sophos;i="5.84,222,1620716400"; d="scan'208";a="487585286" Received: from dhowell-mobl.ger.corp.intel.com (HELO mwauld-desk1.intel.com) ([10.213.219.126]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jul 2021 05:26:42 -0700 From: Matthew Auld To: igt-dev@lists.freedesktop.org Date: Thu, 8 Jul 2021 13:25:54 +0100 Message-Id: <20210708122554.1874987-3-matthew.auld@intel.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210708122554.1874987-1-matthew.auld@intel.com> References: <20210708122554.1874987-1-matthew.auld@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH i-g-t 3/3] tests/i915_query: add some sanity checking around regions query X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Ensure if we feed garbage into DRM_I915_QUERY_MEMORY_REGIONS it does indeed fail as expected. Also add some asserts for the invariants with the probed regions, for example we should always have at least system memory. Signed-off-by: Matthew Auld Cc: Ville Syrjala --- tests/i915/i915_query.c | 127 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 127 insertions(+) diff --git a/tests/i915/i915_query.c b/tests/i915/i915_query.c index 34965841..78bd4a2b 100644 --- a/tests/i915/i915_query.c +++ b/tests/i915/i915_query.c @@ -33,6 +33,10 @@ IGT_TEST_DESCRIPTION("Testing the i915 query uAPI."); */ #define MIN_TOPOLOGY_ITEM_SIZE (sizeof(struct drm_i915_query_topology_info) + 3) +/* All devices should have at least one region. */ +#define MIN_REGIONS_ITEM_SIZE (sizeof(struct drm_i915_query_memory_regions) + \ + sizeof(struct drm_i915_memory_region_info)) + static int __i915_query(int fd, struct drm_i915_query *q) { @@ -491,6 +495,119 @@ test_query_topology_known_pci_ids(int fd, int devid) free(topo_info); } +static bool query_regions_supported(int fd) +{ + struct drm_i915_query_item item = { + .query_id = DRM_I915_QUERY_MEMORY_REGIONS, + }; + + return __i915_query_items(fd, &item, 1) == 0 && item.length > 0; +} + +static void test_query_regions_garbage_items(int fd) +{ + struct drm_i915_query_memory_regions *regions; + struct drm_i915_query_item item; + int i; + + test_query_garbage_items(fd, + DRM_I915_QUERY_MEMORY_REGIONS, + MIN_REGIONS_ITEM_SIZE, + sizeof(struct drm_i915_query_memory_regions)); + + memset(&item, 0, sizeof(item)); + item.query_id = DRM_I915_QUERY_MEMORY_REGIONS; + i915_query_items(fd, &item, 1); + igt_assert(item.length > 0); + + regions = calloc(1, item.length); + item.data_ptr = to_user_pointer(regions); + + /* Bogus; in-MBZ */ + for (i = 0; i < ARRAY_SIZE(regions->rsvd); i++) { + regions->rsvd[i] = 0xdeadbeaf; + i915_query_items(fd, &item, 1); + igt_assert_eq(item.length, -EINVAL); + regions->rsvd[i] = 0; + } + + i915_query_items(fd, &item, 1); + igt_assert(regions->num_regions); + igt_assert(item.length > 0); + + /* Bogus; out-MBZ */ + for (i = 0; i < regions->num_regions; i++) { + struct drm_i915_memory_region_info info = regions->regions[i]; + int j; + + igt_assert_eq_u32(info.rsvd0, 0); + + for (j = 0; j < ARRAY_SIZE(info.rsvd1); j++) + igt_assert_eq_u32(info.rsvd1[j], 0); + } + + /* Bogus; kernel is meant to set this */ + regions->num_regions = 1; + i915_query_items(fd, &item, 1); + igt_assert_eq(item.length, -EINVAL); + regions->num_regions = 0; + + free(regions); +} + +static void test_query_regions_sanity_check(int fd) +{ + struct drm_i915_query_memory_regions *regions; + struct drm_i915_query_item item; + bool found_system; + int i; + + memset(&item, 0, sizeof(item)); + item.query_id = DRM_I915_QUERY_MEMORY_REGIONS; + i915_query_items(fd, &item, 1); + igt_assert(item.length > 0); + + regions = calloc(1, item.length); + + item.data_ptr = to_user_pointer(regions); + i915_query_items(fd, &item, 1); + + /* We should always have at least one region */ + igt_assert(regions->num_regions); + + found_system = false; + for (i = 0; i < regions->num_regions; i++) { + struct drm_i915_gem_memory_class_instance r1 = + regions->regions[i].region; + int j; + + if (r1.memory_class == I915_MEMORY_CLASS_SYSTEM) { + igt_assert_eq(r1.memory_instance, 0); + found_system = true; + } + + igt_assert(r1.memory_class == I915_MEMORY_CLASS_SYSTEM || + r1.memory_class == I915_MEMORY_CLASS_DEVICE); + + for (j = 0; j < regions->num_regions; j++) { + struct drm_i915_gem_memory_class_instance r2 = + regions->regions[j].region; + + if (i == j) + continue; + + /* All probed class:instance pairs must be unique */ + igt_assert(!(r1.memory_class == r2.memory_class && + r1.memory_instance == r2.memory_instance)); + } + } + + /* All devices should at least have system memory */ + igt_assert(found_system); + + free(regions); +} + static bool query_engine_info_supported(int fd) { struct drm_i915_query_item item = { @@ -779,6 +896,16 @@ igt_main test_query_topology_known_pci_ids(fd, devid); } + igt_subtest("query-regions-garbage-items") { + igt_require(query_regions_supported(fd)); + test_query_regions_garbage_items(fd); + } + + igt_subtest("query-regions-sanity-check") { + igt_require(query_regions_supported(fd)); + test_query_regions_sanity_check(fd); + } + igt_subtest_group { igt_fixture { igt_require(query_engine_info_supported(fd)); -- 2.26.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx