Re: [Intel-gfx] [PATCH RESEND v7 12/12] drm/i915: Move the GGTT from i915 private data to the GT

kernel test robot
2021-12-13T16:14:33Z

Hi Andi,

I love your patch! Yet something to improve:

[auto build test ERROR on drm-tip/drm-tip]
[also build test ERROR on drm/drm-next]
[cannot apply to drm-intel/for-linux-next drm-exynos/exynos-drm-next v5.16-rc5]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url: https://github.com/0day-ci/linux/commits/Andi-Shyti/More-preparation-for-multi-gt-patches/20211212-232416
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-randconfig-a003-20211213 (https://download.01.org/0day-ci/archive/20211213/202112132358.IwEcWeWW-lkp@intel.com/config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project b6a2ddb6c8ac29412b1361810972e15221fa021c)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/98ef49d710790dda7a193c10b5b7f28516f730bc
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Andi-Shyti/More-preparation-for-multi-gt-patches/20211212-232416
git checkout 98ef49d710790dda7a193c10b5b7f28516f730bc
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> drivers/gpu/drm/i915/gvt/gtt.c:321:25: error: passing 'struct i915_ggtt' to parameter of incompatible type 'struct i915_ggtt *'; take the address with &
e->val64 = read_pte64(vgpu->gvt->gt->ggtt, index);
^~~~~~~~~~~~~~~~~~~
&
drivers/gpu/drm/i915/gvt/gtt.c:282:41: note: passing argument to parameter 'ggtt' here
static u64 read_pte64(struct i915_ggtt *ggtt, unsigned long index)
^
drivers/gpu/drm/i915/gvt/gtt.c:346:15: error: passing 'struct i915_ggtt' to parameter of incompatible type 'struct i915_ggtt *'; take the address with &
write_pte64(vgpu->gvt->gt->ggtt, index, e->val64);
^~~~~~~~~~~~~~~~~~~
&
drivers/gpu/drm/i915/gvt/gtt.c:296:43: note: passing argument to parameter 'ggtt' here
static void write_pte64(struct i915_ggtt *ggtt, unsigned long index, u64 pte)
^
drivers/gpu/drm/i915/gvt/gtt.c:2900:17: error: passing 'struct i915_ggtt' to parameter of incompatible type 'struct i915_ggtt *'; take the address with &
write_pte64(vgpu->gvt->gt->ggtt, offset + idx, pte);
^~~~~~~~~~~~~~~~~~~
&
drivers/gpu/drm/i915/gvt/gtt.c:296:43: note: passing argument to parameter 'ggtt' here
static void write_pte64(struct i915_ggtt *ggtt, unsigned long index, u64 pte)
^
drivers/gpu/drm/i915/gvt/gtt.c:2908:17: error: passing 'struct i915_ggtt' to parameter of incompatible type 'struct i915_ggtt *'; take the address with &
write_pte64(vgpu->gvt->gt->ggtt, offset + idx, pte);
^~~~~~~~~~~~~~~~~~~
&
drivers/gpu/drm/i915/gvt/gtt.c:296:43: note: passing argument to parameter 'ggtt' here
static void write_pte64(struct i915_ggtt *ggtt, unsigned long index, u64 pte)
^
4 errors generated.

vim +321 drivers/gpu/drm/i915/gvt/gtt.c

2707e44466881d Zhi Wang 2016-03-28 302
4b2dbbc22541e4 Changbin Du 2017-08-02 303 static inline int gtt_get_entry64(void *pt,
2707e44466881d Zhi Wang 2016-03-28 304 struct intel_gvt_gtt_entry *e,
2707e44466881d Zhi Wang 2016-03-28 305 unsigned long index, bool hypervisor_access, unsigned long gpa,
2707e44466881d Zhi Wang 2016-03-28 306 struct intel_vgpu *vgpu)
2707e44466881d Zhi Wang 2016-03-28 307 {
2707e44466881d Zhi Wang 2016-03-28 308 const struct intel_gvt_device_info *info = &vgpu->gvt->device_info;
2707e44466881d Zhi Wang 2016-03-28 309 int ret;
2707e44466881d Zhi Wang 2016-03-28 310
2707e44466881d Zhi Wang 2016-03-28 311 if (WARN_ON(info->gtt_entry_size != 8))
4b2dbbc22541e4 Changbin Du 2017-08-02 312 return -EINVAL;
2707e44466881d Zhi Wang 2016-03-28 313
2707e44466881d Zhi Wang 2016-03-28 314 if (hypervisor_access) {
2707e44466881d Zhi Wang 2016-03-28 315 ret = intel_gvt_hypervisor_read_gpa(vgpu, gpa +
2707e44466881d Zhi Wang 2016-03-28 316 (index << info->gtt_entry_size_shift),
2707e44466881d Zhi Wang 2016-03-28 317 &e->val64, 8);
4b2dbbc22541e4 Changbin Du 2017-08-02 318 if (WARN_ON(ret))
4b2dbbc22541e4 Changbin Du 2017-08-02 319 return ret;
2707e44466881d Zhi Wang 2016-03-28 320 } else if (!pt) {
a61ac1e75105a0 Chris Wilson 2020-03-06 @321 e->val64 = read_pte64(vgpu->gvt->gt->ggtt, index);
2707e44466881d Zhi Wang 2016-03-28 322 } else {
2707e44466881d Zhi Wang 2016-03-28 323 e->val64 = *((u64 *)pt + index);
2707e44466881d Zhi Wang 2016-03-28 324 }
4b2dbbc22541e4 Changbin Du 2017-08-02 325 return 0;
2707e44466881d Zhi Wang 2016-03-28 326 }
2707e44466881d Zhi Wang 2016-03-28 327

---
0-DAY CI Kernel Test Service, Intel Corporation