intel-gfx.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
From: Zhi Wang <zhi.wang.linux@gmail.com>
To: hch@lst.de, jgg@nvidia.com, jani.nikula@linux.intel.com
Cc: intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	dri-devel@lists.freedesktop.org,
	intel-gvt-dev@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 2/3] i915/gvt: save the initial HW state snapshot in i915.
Date: Thu, 27 Jan 2022 07:05:07 -0500	[thread overview]
Message-ID: <20220127120508.11330-2-zhi.a.wang@intel.com> (raw)
In-Reply-To: <20220127120508.11330-1-zhi.a.wang@intel.com>

Save the inital HW state snapshot in i915 so that the rest code of GVT-g
can be moved into a dedicated module while it can still get a clean
initial HW state saved at the correct time during the initialization of
i915. The futhrer vGPU created by GVT-g will use this HW state as the
initial HW state.

Cc: Christoph Hellwig <hch@lst.de>
Cc: Jason Gunthorpe <jgg@nvidia.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Vivi Rodrigo <rodrigo.vivi@intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h  |   2 +
 drivers/gpu/drm/i915/intel_gvt.c | 110 ++++++++++++++++++++++++++++++-
 2 files changed, 110 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 44c1f98144b4..2a230840cdfa 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -606,6 +606,8 @@ struct i915_virtual_gpu {
 	struct mutex lock; /* serialises sending of g2v_notify command pkts */
 	bool active;
 	u32 caps;
+	u32 *initial_mmio;
+	u8 *initial_cfg_space;
 };
 
 struct i915_selftest_stash {
diff --git a/drivers/gpu/drm/i915/intel_gvt.c b/drivers/gpu/drm/i915/intel_gvt.c
index cf6e98962d82..a3d8bdb24d3f 100644
--- a/drivers/gpu/drm/i915/intel_gvt.c
+++ b/drivers/gpu/drm/i915/intel_gvt.c
@@ -86,6 +86,103 @@ void intel_gvt_sanitize_options(struct drm_i915_private *dev_priv)
 	dev_priv->params.enable_gvt = 0;
 }
 
+static void free_initial_hw_state(struct drm_i915_private *dev_priv)
+{
+	struct i915_virtual_gpu *vgpu = &dev_priv->vgpu;
+
+	vfree(vgpu->initial_mmio);
+	vgpu->initial_mmio = NULL;
+
+	kfree(vgpu->initial_cfg_space);
+	vgpu->initial_cfg_space = NULL;
+}
+
+static void save_mmio(struct intel_gvt_mmio_table_iter *iter, u32 offset,
+		      u32 size)
+{
+	struct drm_i915_private *dev_priv = iter->i915;
+	void *mmio = iter->data;
+	u32 start, end, i;
+
+	start = offset;
+	end = offset + size;
+
+	for (i = start; i < end; i += 4) {
+		*(u32 *)(mmio + i) = intel_uncore_read_notrace(
+				to_gt(dev_priv)->uncore, _MMIO(offset));
+	}
+}
+
+static int do_mmio(u32 offset, u16 flags, u32 size, u32 addr_mask,
+		   u32 ro_mask, u32 device,
+		   struct intel_gvt_mmio_table_iter *iter)
+{
+	if (WARN_ON(!IS_ALIGNED(offset, 4)))
+		return -EINVAL;
+
+	save_mmio(iter, offset, size);
+	return 0;
+}
+
+static int do_mmio_block(u32 offset, u32 size, u32 device,
+			 struct intel_gvt_mmio_table_iter *iter)
+{
+	if (WARN_ON(!IS_ALIGNED(offset, 4)))
+		return -EINVAL;
+
+	save_mmio(iter, offset, size);
+	return 0;
+}
+
+static int save_inital_hw_state(struct drm_i915_private *dev_priv)
+{
+	struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
+	struct intel_gvt_device_info info;
+	struct i915_virtual_gpu *vgpu = &dev_priv->vgpu;
+	struct intel_gvt_mmio_table_iter iter;
+	void *mem;
+	int i, ret;
+
+	intel_gvt_init_device_info(dev_priv, &info);
+
+	mem = kzalloc(info.cfg_space_size, GFP_KERNEL);
+	if (!mem)
+		return -ENOMEM;
+
+	vgpu->initial_cfg_space = mem;
+
+	for (i = 0; i < PCI_CFG_SPACE_EXP_SIZE; i += 4)
+		pci_read_config_dword(pdev, i, mem + i);
+
+	mem = vzalloc(info.mmio_size);
+	if (!mem) {
+		ret = -ENOMEM;
+		goto err_mmio;
+	}
+
+	vgpu->initial_mmio = mem;
+
+	iter.i915 = dev_priv;
+	iter.data = vgpu->initial_mmio;
+	iter.do_mmio = do_mmio;
+	iter.do_mmio_block = do_mmio_block;
+
+	ret = intel_gvt_iterate_mmio_table(&iter);
+	if (ret)
+		goto err_iterate;
+
+	return 0;
+
+err_iterate:
+	vfree(vgpu->initial_mmio);
+	vgpu->initial_mmio = NULL;
+err_mmio:
+	kfree(vgpu->initial_cfg_space);
+	vgpu->initial_cfg_space = NULL;
+
+	return ret;
+}
+
 /**
  * intel_gvt_init - initialize GVT components
  * @dev_priv: drm i915 private data
@@ -115,15 +212,23 @@ int intel_gvt_init(struct drm_i915_private *dev_priv)
 		return -EIO;
 	}
 
+	ret = save_inital_hw_state(dev_priv);
+	if (ret) {
+		drm_dbg(&dev_priv->drm, "Fail to save inital HW state\n");
+		goto err_save_hw_state;
+	}
+
 	ret = intel_gvt_init_device(dev_priv);
 	if (ret) {
 		drm_dbg(&dev_priv->drm, "Fail to init GVT device\n");
-		goto bail;
+		goto err_init_device;
 	}
 
 	return 0;
 
-bail:
+err_init_device:
+	free_initial_hw_state(dev_priv);
+err_save_hw_state:
 	dev_priv->params.enable_gvt = 0;
 	return 0;
 }
@@ -147,6 +252,7 @@ void intel_gvt_driver_remove(struct drm_i915_private *dev_priv)
 		return;
 
 	intel_gvt_clean_device(dev_priv);
+	free_initial_hw_state(dev_priv);
 }
 
 /**
-- 
2.25.1


  reply	other threads:[~2022-01-27 12:05 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-27 12:05 [Intel-gfx] [PATCH 1/3] i915/gvt: Introduce the mmio_table.c to support VFIO new mdev API Zhi Wang
2022-01-27 12:05 ` Zhi Wang [this message]
2022-01-31  6:38   ` [Intel-gfx] [PATCH 2/3] i915/gvt: save the initial HW state snapshot in i915 Christoph Hellwig
2022-01-27 12:05 ` [Intel-gfx] [PATCH 3/3] i915/gvt: Use the initial HW state snapshot saved " Zhi Wang
2022-01-27 14:52 ` [Intel-gfx] [PATCH 1/3] i915/gvt: Introduce the mmio_table.c to support VFIO new mdev API Christoph Hellwig
2022-01-27 15:17 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] " Patchwork
2022-01-27 15:18 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-01-27 15:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-01-27 17:14 ` [Intel-gfx] [PATCH 1/3] " kernel test robot
2022-01-27 17:46 ` kernel test robot
2022-01-27 19:08 ` kernel test robot
2022-01-27 20:50 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] " Patchwork
2022-01-28  5:01 ` [Intel-gfx] [RFC PATCH] i915/gvt: intel_gvt_match_device() can be static kernel test robot
2022-01-28  5:11 ` [Intel-gfx] [PATCH 1/3] i915/gvt: Introduce the mmio_table.c to support VFIO new mdev API kernel test robot
2022-01-31  6:34 ` Christoph Hellwig
2022-02-07  7:32 ` Christoph Hellwig
2022-02-07  8:28   ` Wang, Zhi A
2022-02-07  8:35     ` Christoph Hellwig
2022-02-07 10:48       ` Jani Nikula
2022-02-07 11:57         ` Zhi Wang
2022-02-07 12:06           ` Christoph Hellwig
2022-02-07 12:13             ` Jani Nikula
2022-02-08  8:04         ` Joonas Lahtinen
2022-02-07 14:47 ` kernel test robot
2022-02-08 14:38 ` kernel test robot
  -- strict thread matches above, loose matches on Subject: below --
2021-11-08 21:27 [Intel-gfx] [PATCH 1/3] i915/gvt: seperate tracked MMIO table from handlers.c Zhi Wang
2021-11-08 21:27 ` [Intel-gfx] [PATCH 2/3] i915/gvt: save the initial HW state snapshot in i915 Zhi Wang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220127120508.11330-2-zhi.a.wang@intel.com \
    --to=zhi.wang.linux@gmail.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=hch@lst.de \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-gvt-dev@lists.freedesktop.org \
    --cc=jani.nikula@linux.intel.com \
    --cc=jgg@nvidia.com \
    --cc=linux-kernel@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).