From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E14E7C433F5 for ; Fri, 18 Feb 2022 21:02:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5B0CD10E1B1; Fri, 18 Feb 2022 21:02:39 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 518C410E1B1; Fri, 18 Feb 2022 21:02:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1645218158; x=1676754158; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=V1eLV/y0z7huggG7K0R0fJvDE1jzU70TClA48L6pUTM=; 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charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20220216174147.3073235-15-lucas.demarchi@intel.com> User-Agent: Mutt/1.9.4 (2018-02-28) Subject: Re: [Intel-gfx] [PATCH v3 14/16] drm/i915/guc: Convert guc_mmio_reg_state_init to iosys_map X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas =?iso-8859-1?Q?Hellstr=F6m?= , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Sumit Semwal , Thomas Zimmermann , Christian =?iso-8859-1?Q?K=F6nig?= Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Wed, Feb 16, 2022 at 09:41:45AM -0800, Lucas De Marchi wrote: > Now that the regset list is prepared, convert guc_mmio_reg_state_init() > to use iosys_map to copy the array to the final location and > initialize additional fields in ads.reg_state_list. > > v2: Just use an offset instead of temporary iosys_map. > > Cc: Matt Roper > Cc: Thomas Hellström > Cc: Daniel Vetter > Cc: John Harrison > Cc: Matthew Brost > Cc: Daniele Ceraolo Spurio > Signed-off-by: Lucas De Marchi Reviewed-by: Matthew Brost > --- > drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 28 ++++++++++++---------- > 1 file changed, 16 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c > index ec0ccdf98dfa..90cbb93a2945 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c > @@ -383,40 +383,44 @@ static long guc_mmio_reg_state_create(struct intel_guc *guc) > return ret; > } > > -static void guc_mmio_reg_state_init(struct intel_guc *guc, > - struct __guc_ads_blob *blob) > +static void guc_mmio_reg_state_init(struct intel_guc *guc) > { > struct intel_gt *gt = guc_to_gt(guc); > struct intel_engine_cs *engine; > - struct guc_mmio_reg *ads_registers; > enum intel_engine_id id; > u32 addr_ggtt, offset; > > offset = guc_ads_regset_offset(guc); > addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset; > - ads_registers = (struct guc_mmio_reg *)(((u8 *)blob) + offset); > > - memcpy(ads_registers, guc->ads_regset, guc->ads_regset_size); > + iosys_map_memcpy_to(&guc->ads_map, offset, guc->ads_regset, > + guc->ads_regset_size); > > for_each_engine(engine, gt, id) { > u32 count = guc->ads_regset_count[id]; > - struct guc_mmio_reg_set *ads_reg_set; > u8 guc_class; > > /* Class index is checked in class converter */ > GEM_BUG_ON(engine->instance >= GUC_MAX_INSTANCES_PER_CLASS); > > guc_class = engine_class_to_guc_class(engine->class); > - ads_reg_set = &blob->ads.reg_state_list[guc_class][engine->instance]; > > if (!count) { > - ads_reg_set->address = 0; > - ads_reg_set->count = 0; > + ads_blob_write(guc, > + ads.reg_state_list[guc_class][engine->instance].address, > + 0); > + ads_blob_write(guc, > + ads.reg_state_list[guc_class][engine->instance].count, > + 0); > continue; > } > > - ads_reg_set->address = addr_ggtt; > - ads_reg_set->count = count; > + ads_blob_write(guc, > + ads.reg_state_list[guc_class][engine->instance].address, > + addr_ggtt); > + ads_blob_write(guc, > + ads.reg_state_list[guc_class][engine->instance].count, > + count); > > addr_ggtt += count * sizeof(struct guc_mmio_reg); > } > @@ -643,7 +647,7 @@ static void __guc_ads_init(struct intel_guc *guc) > blob->ads.gt_system_info = base + ptr_offset(blob, system_info); > > /* MMIO save/restore list */ > - guc_mmio_reg_state_init(guc, blob); > + guc_mmio_reg_state_init(guc); > > /* Private Data */ > blob->ads.private_data = base + guc_ads_private_data_offset(guc); > -- > 2.35.1 >