From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A14C3C433EF for ; Wed, 13 Jul 2022 00:54:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A048097EEA; Wed, 13 Jul 2022 00:54:40 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6CD4297EE5; Wed, 13 Jul 2022 00:54:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1657673679; x=1689209679; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=4PUrxdQMtTHVmDhqGxhm30yFo3LVoIfwvzyprwD87rc=; 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charset=us-ascii Content-Disposition: inline In-Reply-To: <20220712233136.1044951-10-John.C.Harrison@Intel.com> User-Agent: Mutt/1.9.4 (2018-02-28) Subject: Re: [Intel-gfx] [PATCH 09/12] drm/i915/selftest: Cope with not having an RCS engine X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-GFX@Lists.FreeDesktop.Org, DRI-Devel@Lists.FreeDesktop.Org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Tue, Jul 12, 2022 at 04:31:33PM -0700, John.C.Harrison@Intel.com wrote: > From: John Harrison > > It is no longer guaranteed that there will always be an RCS engine. > So, use the helper function for finding the first available engine that > can be used for general purpose selftets. > > Signed-off-by: John Harrison Reviewed-by: Matthew Brost > --- > drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 12 +++++++++--- > 1 file changed, 9 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c > index 6493265d5f642..7f3bb1d34dfbf 100644 > --- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c > +++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c > @@ -1302,13 +1302,15 @@ static int igt_reset_wait(void *arg) > { > struct intel_gt *gt = arg; > struct i915_gpu_error *global = >->i915->gpu_error; > - struct intel_engine_cs *engine = gt->engine[RCS0]; > + struct intel_engine_cs *engine; > struct i915_request *rq; > unsigned int reset_count; > struct hang h; > long timeout; > int err; > > + engine = intel_selftest_find_any_engine(gt); > + > if (!engine || !intel_engine_can_store_dword(engine)) > return 0; > > @@ -1432,7 +1434,7 @@ static int __igt_reset_evict_vma(struct intel_gt *gt, > int (*fn)(void *), > unsigned int flags) > { > - struct intel_engine_cs *engine = gt->engine[RCS0]; > + struct intel_engine_cs *engine; > struct drm_i915_gem_object *obj; > struct task_struct *tsk = NULL; > struct i915_request *rq; > @@ -1444,6 +1446,8 @@ static int __igt_reset_evict_vma(struct intel_gt *gt, > if (!gt->ggtt->num_fences && flags & EXEC_OBJECT_NEEDS_FENCE) > return 0; > > + engine = intel_selftest_find_any_engine(gt); > + > if (!engine || !intel_engine_can_store_dword(engine)) > return 0; > > @@ -1819,12 +1823,14 @@ static int igt_handle_error(void *arg) > { > struct intel_gt *gt = arg; > struct i915_gpu_error *global = >->i915->gpu_error; > - struct intel_engine_cs *engine = gt->engine[RCS0]; > + struct intel_engine_cs *engine; > struct hang h; > struct i915_request *rq; > struct i915_gpu_coredump *error; > int err; > > + engine = intel_selftest_find_any_engine(gt); > + > /* Check that we can issue a global GPU and engine reset */ > > if (!intel_has_reset_engine(gt)) > -- > 2.36.0 >