From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A33E3C4167B for ; Fri, 8 Dec 2023 06:24:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 33F2310E255; Fri, 8 Dec 2023 06:24:24 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6C68F10E037 for ; Fri, 8 Dec 2023 06:24:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702016664; x=1733552664; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=DXoLGbuDBn78vtgyMZQjDalC2p++jYECcAtVTTVElvc=; b=KmGw2s30bmBzAYYEDIOpaYLA7unpK1fQJtfbhYev6onoHVGVoWokNiYI g7ZZhZrErl5L5NN1fJqH6GpuJaW3E4yI8D6GY+qCzWf6Jy3q62WbBG1Tf qizwI8sBfTruj87eKblW+EAGtSkcThQtweJokg+g/9GLXMxiKjLKo7lUQ TANBY/wXR+EJwJg5qtN2wSVPdcy7wIgSEMMycvsHuMVLcRMToEzqdAkO+ Fy8TJWkmJ5Dao2Cmyfw5SbnQYyqP13OKPWoraJcGaCFsM5TQ4/S8PQycq FUORhkF1lipoJlaEohNIpynZcFEbT7L7gBGg9AlLexlTTAFy5Ikn0p/o0 g==; X-IronPort-AV: E=McAfee;i="6600,9927,10917"; a="1432088" X-IronPort-AV: E=Sophos;i="6.04,260,1695711600"; d="scan'208";a="1432088" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Dec 2023 22:24:20 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10917"; a="838023807" X-IronPort-AV: E=Sophos;i="6.04,260,1695711600"; d="scan'208";a="838023807" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by fmsmga008.fm.intel.com with ESMTP; 07 Dec 2023 22:24:18 -0800 From: Mitul Golani To: intel-gfx@lists.freedesktop.org Subject: [PATCH 0/3] Enable Adaptive Sync SDP Support for DP Date: Fri, 8 Dec 2023 11:49:30 +0530 Message-Id: <20231208061933.964588-1-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" An Adaptive Sync SDP allows a DP protocol converter to forward Adaptive Sync video with minimal buffering overhead within the converter. An Adaptive-Sync-capable DP protocol converter indicates its support by setting the related bit in the DPCD register. Computes AS SDP values based on the display configuration, ensuring proper handling of Variable Refresh Rate (VRR) in the context of Adaptive Sync. --v2: - Update logging to Patch-1 - use as_sdp instead of async - Put definitions to correct placeholders from where it is defined. - Update member types of as_sdp for uniformity. - Correct use of REG_BIT and REG_GENMASK. - Remove unrelated comments and changes. - Correct code indents. - separate out patch changes for intel_read/write_dp_sdp. Mitul Golani (3): drm: Add Adaptive Sync SDP logging drm/i915/dp: Add Read/Write support for Adaptive Sync SDP drm/i915/display: Compute and Enable AS SDP drivers/gpu/drm/display/drm_dp_helper.c | 12 ++ .../drm/i915/display/intel_crtc_state_dump.c | 12 ++ drivers/gpu/drm/i915/display/intel_ddi.c | 3 + .../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 115 +++++++++++++++++- drivers/gpu/drm/i915/display/intel_hdmi.c | 12 +- drivers/gpu/drm/i915/i915_reg.h | 6 + include/drm/display/drm_dp.h | 2 + include/drm/display/drm_dp_helper.h | 33 +++++ 9 files changed, 193 insertions(+), 3 deletions(-) -- 2.25.1