From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B3461C41535 for ; Tue, 19 Dec 2023 08:55:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4BF0710E421; Tue, 19 Dec 2023 08:55:43 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id E9BC810E448 for ; Tue, 19 Dec 2023 08:55:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702976141; x=1734512141; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=bcTkxqGUfmzdO/6IarNokR7giMjqA1QuL+1HKe1R9IE=; b=ExnW+eQMrBN/StpkMmoz1d9l6JhpYTGEXAApdJzyYwkuLgWrkF/Jh37Q DRGFS8lnsX5s8QUU8H0yO0YwGgm+vXm7J+bsn1KOf0XBOEn/oQ43r0un2 XabrOKg3t46HMvr+eKDcBWSkFcKsDmwist5T4nAMw4lDoc8mzgOE11xBY NNZ3+EVO9uO05tlcGt5lkK1LAaEqWiEA1TKPEH3pBV0wKiSheWLDisv2B 1NMjmf4EIrYV/Ymakja5uXtO5spNAAc5o9Qm5ciI+AqTvRJdJo1z8xigB ulVc7SUY+JH8X9a4Eh/UrglzrDpAyMrWXY0gwT6lDo2zU6ZdNEmCsbEqN w==; X-IronPort-AV: E=McAfee;i="6600,9927,10928"; a="399462035" X-IronPort-AV: E=Sophos;i="6.04,287,1695711600"; d="scan'208";a="399462035" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Dec 2023 00:55:41 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10928"; a="846272325" X-IronPort-AV: E=Sophos;i="6.04,287,1695711600"; d="scan'208";a="846272325" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by fmsmga004.fm.intel.com with ESMTP; 19 Dec 2023 00:55:40 -0800 From: Mitul Golani To: intel-gfx@lists.freedesktop.org Subject: [PATCH 0/3] Date: Tue, 19 Dec 2023 14:21:01 +0530 Message-Id: <20231219085104.1211388-1-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" An Adaptive Sync SDP allows a DP protocol converter to forward Adaptive Sync video with minimal buffering overhead within the converter. An Adaptive-Sync-capable DP protocol converter indicates its support by setting the related bit in the DPCD register. Computes AS SDP values based on the display configuration, ensuring proper handling of Variable Refresh Rate (VRR) in the context of Adaptive Sync. --v2: - Update logging to Patch-1 - use as_sdp instead of async - Put definitions to correct placeholders from where it is defined. - Update member types of as_sdp for uniformity. - Correct use of REG_BIT and REG_GENMASK. - Remove unrelated comments and changes. - Correct code indents. - separate out patch changes for intel_read/write_dp_sdp. --v3: - Add VIDEO_DIP_ASYNC_DATA_SIZE definition and comment in as_sdp_pack function to patch 2 as originally used there. [Patch 2]. - Add VIDEO_DIP_ENABLE_AS_HSW flag to intel_dp_set_infoframes [Patch 3]. --v4: - Add check for HAS_VRR before writing AS SDP. [Patch 3]. --v5: - Add missing check for HAS_VRR before reading AS SDP as well [Patch 3]. Mitul Golani (3): drm: Add Adaptive Sync SDP logging drm/i915/dp: Add Read/Write support for Adaptive Sync SDP drm/i915/display: Compute and Enable AS SDP drivers/gpu/drm/display/drm_dp_helper.c | 12 ++ .../drm/i915/display/intel_crtc_state_dump.c | 12 ++ drivers/gpu/drm/i915/display/intel_ddi.c | 3 + .../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 118 +++++++++++++++++- drivers/gpu/drm/i915/display/intel_hdmi.c | 12 +- drivers/gpu/drm/i915/i915_reg.h | 6 + include/drm/display/drm_dp.h | 2 + include/drm/display/drm_dp_helper.h | 33 +++++ 9 files changed, 195 insertions(+), 4 deletions(-) -- 2.25.1