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[82.69.66.36]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43bd41c7cc7sm62259775e9.0.2025.03.06.11.23.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Mar 2025 11:23:32 -0800 (PST) Date: Thu, 6 Mar 2025 19:23:31 +0000 From: David Laight To: Vincent Mailhol via B4 Relay Cc: mailhol.vincent@wanadoo.fr, Yury Norov , Lucas De Marchi , Rasmus Villemoes , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , David Airlie , Simona Vetter , Andrew Morton , linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Andi Shyti , David Laight , Dmitry Baryshkov , Andy Shevchenko Subject: Re: [PATCH v5 1/7] bits: split the definition of the asm and non-asm GENMASK() Message-ID: <20250306192331.2701a029@pumpkin> In-Reply-To: <20250306-fixed-type-genmasks-v5-1-b443e9dcba63@wanadoo.fr> References: <20250306-fixed-type-genmasks-v5-0-b443e9dcba63@wanadoo.fr> <20250306-fixed-type-genmasks-v5-1-b443e9dcba63@wanadoo.fr> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Mailman-Approved-At: Fri, 07 Mar 2025 13:57:54 +0000 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, 06 Mar 2025 20:29:52 +0900 Vincent Mailhol via B4 Relay wrote: > From: Vincent Mailhol > > In an upcoming change, GENMASK() and its friends will indirectly > depend on sizeof() which is not available in asm. > > Instead of adding further complexity to __GENMASK() to make it work > for both asm and non asm, just split the definition of the two > variants. ... > +#else /* defined(__ASSEMBLY__) */ > + > +#define GENMASK(h, l) __GENMASK(h, l) > +#define GENMASK_ULL(h, l) __GENMASK_ULL(h, l) What do those actually expand to now? As I've said a few times both UL(0) and ULL(0) are just (0) for __ASSEMBLY__ so the expansions of __GENMASK() and __GENMASK_ULL() contained the same numeric constants. This means they should be generating the same values. I don't know the correct 'sizeof (int_type)' for the shift right of ~0. My suspicion is that a 32bit assembler used 32bit signed integers and a 64bit one 64bit signed integers (but a 32bit asm on a 64bit host might be 64bit). So the asm versions need to avoid the right shift and only do left shifts. Which probably means they need to be enirely separate from the C versions. And then the C ones can have all the ULL() removed. David > + > +#endif /* !defined(__ASSEMBLY__) */ > > #endif /* __LINUX_BITS_H */ >