From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 88EE3C7EE2A for ; Tue, 24 Jun 2025 07:51:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 235C610E50C; Tue, 24 Jun 2025 07:51:39 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="eE0hs0RH"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5F02210E510; Tue, 24 Jun 2025 07:51:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1750751497; x=1782287497; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=vqnx/X+RrUJ8oSTB4RyKGJ7TR04ZOcTyhJHeBoag8NI=; b=eE0hs0RHqWztA5fEXTmQs0vp2B8SJzCOcYp9WxJKCdo+3PZVdIISWiMz 5K3mHrD8kiN8EADGQMuh07+kn4vvb6JeaN5Z81mBNTqjk9C+jVCUdtauj yV7qT6HmWFtTqrWk6IN1xp/lI3DsIcO8DqD5ui9AvYyxfkM6KY9G1gsMl Yg69gTARzyv7O/HP7gmp8+XwLVdBZ95Kt+AWAB/7ISqYR5vrECnQfQtO9 ynB9jE0wNRDHylD1j3CHl/FkWuMg6iBVKOW8yqKu1LyNjplWdwePEp7Mx iy0Dw3/Dt1b35oJNbtXfu9y+JoU++/gxjo5yazrUw4UMOpYvryuwAfN1P Q==; X-CSE-ConnectionGUID: ij62nxO9QpWwRp4g/YfBqg== X-CSE-MsgGUID: 9m8f+ND9QI2i4HL6QQ6U9A== X-IronPort-AV: E=McAfee;i="6800,10657,11473"; a="78398267" X-IronPort-AV: E=Sophos;i="6.16,261,1744095600"; d="scan'208";a="78398267" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jun 2025 00:51:36 -0700 X-CSE-ConnectionGUID: glxfeNejTGeY65UvSzA2pA== X-CSE-MsgGUID: llefxSj2TuiHMo6E4GJVpg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.16,261,1744095600"; d="scan'208";a="175446486" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by fmviesa002.fm.intel.com with ESMTP; 24 Jun 2025 00:51:34 -0700 From: Mitul Golani To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: ville.syrjala@linux.intel.com, ankit.k.nautiyal@intel.com, jani.nikula@linux.intel.com Subject: [PATCH v7 14/18] drm/i915/vrr: Pause DC Balancing for DSB commits Date: Tue, 24 Jun 2025 13:19:44 +0530 Message-ID: <20250624074948.671761-15-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250624074948.671761-1-mitulkumar.ajitkumar.golani@intel.com> References: <20250624074948.671761-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Pause the DMC DC Balancing for the remainder of the commit so that vmin/vmax won't change after we've baked them into the DSB vblank evasion commands. --v2: - Remove typo. (Ankit) - Separate vrr enable structuring. (Ankit) --v3: - Add gaurd before accessing DC balance bits. - Remove redundancy checks. Signed-off-by: Ville Syrjälä Signed-off-by: Mitul Golani Reviewed-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 19 +++++++++++++++++++ drivers/gpu/drm/i915/display/intel_vrr.c | 7 +++++++ 2 files changed, 26 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 939366ecea85..d1f6ff4bfc99 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7231,6 +7231,21 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state, } if (new_crtc_state->use_dsb) { + if (new_crtc_state->vrr.dc_balance.enable) { + /* + * Pause the DMC DC balancing for the remainder of + * the commit so that vmin/vmax won't change after + * we've baked them into the DSB vblank evasion + * commands. + * + * FIXME maybe need a small delay here to make sure + * DMC has finished updating the values? Or we need + * a better DMC<->driver protocol that gives is real + * guarantees about that... + */ + intel_pipedmc_dcb_disable(NULL, crtc); + } + if (intel_crtc_needs_color_update(new_crtc_state)) intel_color_commit_noarm(new_crtc_state->dsb_commit, new_crtc_state); @@ -7276,6 +7291,10 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state, intel_dsb_wait_vblank_delay(state, new_crtc_state->dsb_commit); intel_vrr_check_push_sent(new_crtc_state->dsb_commit, new_crtc_state); + + if (new_crtc_state->vrr.dc_balance.enable) + intel_pipedmc_dcb_enable(new_crtc_state->dsb_commit, crtc); + intel_dsb_interrupt(new_crtc_state->dsb_commit); } diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 91d4fa0d2bf3..98d305d02f35 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -9,6 +9,7 @@ #include "intel_de.h" #include "intel_display_regs.h" #include "intel_display_types.h" +#include "intel_dmc.h" #include "intel_dp.h" #include "intel_dmc_regs.h" #include "intel_vrr.h" @@ -668,6 +669,9 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) if (crtc_state->cmrr.enable) ctl |= VRR_CTL_CMRR_ENABLE; + if (crtc_state->vrr.dc_balance.enable) + intel_pipedmc_dcb_enable(NULL, crtc); + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), ctl); } @@ -682,6 +686,9 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) if (!old_crtc_state->vrr.enable) return; + if (old_crtc_state->vrr.dc_balance.enable) + intel_pipedmc_dcb_disable(NULL, crtc); + ctl = trans_vrr_ctl(old_crtc_state); if (intel_vrr_always_use_vrr_tg(display)) ctl |= VRR_CTL_VRR_ENABLE; -- 2.48.1