intel-gfx.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: ville.syrjala@linux.intel.com,
	Ankit Nautiyal <ankit.k.nautiyal@intel.com>,
	Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Subject: [PATCH 03/12] drm/i915/skl_scaler: Introduce helper for chroma downscale factor
Date: Mon, 25 Aug 2025 18:05:39 +0530	[thread overview]
Message-ID: <20250825123548.3022474-4-ankit.k.nautiyal@intel.com> (raw)
In-Reply-To: <20250825123548.3022474-1-ankit.k.nautiyal@intel.com>

For 444 to 420 output format conversion, scaler uses 2x downscaling in
each direction. Introduce skl_scaler_chroma_downscale_factor() to
encapsulate the chroma subsampling adjustment used in scaler/dsc
pre-fill latency calculations.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
---
 drivers/gpu/drm/i915/display/skl_scaler.c    | 5 +++++
 drivers/gpu/drm/i915/display/skl_scaler.h    | 3 +++
 drivers/gpu/drm/i915/display/skl_watermark.c | 7 +++----
 3 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index c6cccf170ff1..af2cbd54c32e 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -968,3 +968,8 @@ void adl_scaler_ecc_unmask(const struct intel_crtc_state *crtc_state)
 			  1);
 	intel_de_write(display, XELPD_DISPLAY_ERR_FATAL_MASK, 0);
 }
+
+int skl_scaler_chroma_downscale_factor(const struct intel_crtc_state *crtc_state)
+{
+	return crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 4 : 1;
+}
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.h b/drivers/gpu/drm/i915/display/skl_scaler.h
index 12a19016c5f6..257330d4c329 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.h
+++ b/drivers/gpu/drm/i915/display/skl_scaler.h
@@ -45,4 +45,7 @@ skl_scaler_mode_valid(struct intel_display *display,
 void adl_scaler_ecc_mask(const struct intel_crtc_state *crtc_state);
 
 void adl_scaler_ecc_unmask(const struct intel_crtc_state *crtc_state);
+
+int skl_scaler_chroma_downscale_factor(const struct intel_crtc_state *crtc_state);
+
 #endif
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index e3c45a998e37..9e892767fafc 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -30,6 +30,7 @@
 #include "intel_plane.h"
 #include "intel_wm.h"
 #include "skl_universal_plane_regs.h"
+#include "skl_scaler.h"
 #include "skl_watermark.h"
 #include "skl_watermark_regs.h"
 
@@ -2182,8 +2183,7 @@ dsc_prefill_latency(const struct intel_crtc_state *crtc_state, int linetime)
 	const struct intel_crtc_scaler_state *scaler_state =
 					&crtc_state->scaler_state;
 	int num_scaler_users = hweight32(scaler_state->scaler_users);
-	int chroma_downscaling_factor =
-		crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 4 : 1;
+	int chroma_downscaling_factor = skl_scaler_chroma_downscale_factor(crtc_state);
 	u32 dsc_prefill_latency = 0;
 
 	if (!crtc_state->dsc.compression_enable ||
@@ -2223,8 +2223,7 @@ scaler_prefill_latency(const struct intel_crtc_state *crtc_state, int linetime)
 	if (num_scaler_users > 1) {
 		u64 hscale_k = max(1000, mul_u32_u32(scaler_state->scalers[0].hscale, 1000) >> 16);
 		u64 vscale_k = max(1000, mul_u32_u32(scaler_state->scalers[0].vscale, 1000) >> 16);
-		int chroma_downscaling_factor =
-			crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 4 : 1;
+		int chroma_downscaling_factor = skl_scaler_chroma_downscale_factor(crtc_state);
 		int latency;
 
 		latency = DIV_ROUND_UP_ULL((4 * linetime * hscale_k * vscale_k *
-- 
2.45.2


  parent reply	other threads:[~2025-08-25 12:49 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-25 12:35 [PATCH 00/12] Optimize vrr.guardband and fix LRR Ankit Nautiyal
2025-08-25 12:35 ` [PATCH 01/12] drm/i915/skl_watermark: Fix the scaling factor for chroma subsampling Ankit Nautiyal
2025-08-25 12:35 ` [PATCH 02/12] drm/i915/skl_watermark: Pass linetime as argument to latency helpers Ankit Nautiyal
2025-08-25 12:35 ` Ankit Nautiyal [this message]
2025-08-25 12:35 ` [PATCH 04/12] drm/i915/display: Extract helpers to set dsc/scaler prefill latencies Ankit Nautiyal
2025-08-25 12:35 ` [PATCH 05/12] drm/i915/dp: Add SDP latency computation helper Ankit Nautiyal
2025-08-25 12:35 ` [PATCH 06/12] drm/i915/alpm: Add function to compute max link-wake latency Ankit Nautiyal
2025-08-25 12:35 ` [PATCH 07/12] drm/i915/vrr: Use vrr.sync_start for getting vtotal Ankit Nautiyal
2025-08-25 12:35 ` [PATCH 08/12] drm/i915/display: Add guardband check for feature latencies Ankit Nautiyal
2025-08-25 12:35 ` [PATCH 09/12] drm/i915/skl_watermark: Remove redundant latency checks from vblank validation Ankit Nautiyal
2025-08-25 12:35 ` [PATCH 10/12] drm/i915/vrr: Use static guardband to support seamless LRR switching Ankit Nautiyal
2025-08-25 12:35 ` [PATCH 11/12] drm/i915/panel: Refactor helper to get highest fixed mode Ankit Nautiyal
2025-08-25 12:35 ` [PATCH 12/12] drm/i915/vrr: Fix seamless_mn drrs for PTL Ankit Nautiyal
2025-08-25 14:31 ` ✓ i915.CI.BAT: success for Optimize vrr.guardband and fix LRR (rev7) Patchwork
2025-08-25 16:45 ` ✓ i915.CI.Full: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2025-08-20  8:04 [PATCH 00/12] Optimize vrr.guardband and fix LRR Ankit Nautiyal
2025-08-20  8:04 ` [PATCH 03/12] drm/i915/skl_scaler: Introduce helper for chroma downscale factor Ankit Nautiyal
2025-08-18  7:31 [PATCH 00/12] Optimize vrr.guardband and fix LRR Ankit Nautiyal
2025-08-18  7:31 ` [PATCH 03/12] drm/i915/skl_scaler: Introduce helper for chroma downscale factor Ankit Nautiyal
2025-08-07 11:15 [PATCH 00/12] Optimize vrr.guardband and fix LRR Ankit Nautiyal
2025-08-07 11:15 ` [PATCH 03/12] drm/i915/skl_scaler: Introduce helper for chroma downscale factor Ankit Nautiyal
2025-08-07 16:29   ` Golani, Mitulkumar Ajitkumar

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20250825123548.3022474-4-ankit.k.nautiyal@intel.com \
    --to=ankit.k.nautiyal@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=mitulkumar.ajitkumar.golani@intel.com \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).