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From: Gustavo Sousa <gustavo.sousa@intel.com>
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: "Ankit Nautiyal" <ankit.k.nautiyal@intel.com>,
	"Dnyaneshwar Bhadane" <dnyaneshwar.bhadane@intel.com>,
	"Gustavo Sousa" <gustavo.sousa@intel.com>,
	"Jouni Högander" <jouni.hogander@intel.com>,
	"Juha-pekka Heikkila" <juha-pekka.heikkila@intel.com>,
	"Luca Coelho" <luciano.coelho@intel.com>,
	"Lucas De Marchi" <lucas.demarchi@intel.com>,
	"Matt Atwood" <matthew.s.atwood@intel.com>,
	"Matt Roper" <matthew.d.roper@intel.com>,
	"Ravi Kumar Vodapalli" <ravi.kumar.vodapalli@intel.com>,
	"Shekhar Chauhan" <shekhar.chauhan@intel.com>,
	"Vinod Govindapillai" <vinod.govindapillai@intel.com>,
	"Sai Teja Pottumuttu" <sai.teja.pottumuttu@intel.com>,
	"Chaitanya Kumar Borah" <chaitanya.kumar.borah@intel.com>
Subject: [PATCH v2 12/32] drm/i915/xe3p_lpd: Remove gamma,csc bottom color checks
Date: Tue, 21 Oct 2025 21:28:37 -0300	[thread overview]
Message-ID: <20251021-xe3p_lpd-basic-enabling-v2-12-10eae6d655b8@intel.com> (raw)
In-Reply-To: <20251021-xe3p_lpd-basic-enabling-v2-0-10eae6d655b8@intel.com>

From: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>

With Xe3p_LPD, the SKL_BOTTOM_COLOR_GAMMA_ENABLE and
SKL_BOTTOM_COLOR_CSC_ENABLE bits are being removed. Thus, we need not
set gamma_enable nor csc_enable in crtc_state.

Note that GAMMA_MODE.POST_CSC_GAMMA_ENABLE and CSC_MODE.ICL_CSC_ENABLE
are the documented alternatives for the bottom color bits being removed.
But as these suggested bits are being checked in state checker as part
of gamma_mode, csc_mode fields and as gamma_enable/csc_enable are not
being used anywhere else functionally post ICL, we need not set these
fields in crtc_state.

Bspec: 69734
Signed-off-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 51db70d07fae..9102f3eb0bc4 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1090,18 +1090,19 @@ static void skl_get_config(struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(crtc_state);
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
-	u32 tmp;
 
 	crtc_state->gamma_mode = hsw_read_gamma_mode(crtc);
 	crtc_state->csc_mode = ilk_read_csc_mode(crtc);
 
-	tmp = intel_de_read(display, SKL_BOTTOM_COLOR(crtc->pipe));
+	if (DISPLAY_VER(display) < 35) {
+		u32 tmp = intel_de_read(display, SKL_BOTTOM_COLOR(crtc->pipe));
 
-	if (tmp & SKL_BOTTOM_COLOR_GAMMA_ENABLE)
-		crtc_state->gamma_enable = true;
+		if (tmp & SKL_BOTTOM_COLOR_GAMMA_ENABLE)
+			crtc_state->gamma_enable = true;
 
-	if (tmp & SKL_BOTTOM_COLOR_CSC_ENABLE)
-		crtc_state->csc_enable = true;
+		if (tmp & SKL_BOTTOM_COLOR_CSC_ENABLE)
+			crtc_state->csc_enable = true;
+	}
 }
 
 static void skl_color_commit_arm(struct intel_dsb *dsb,

-- 
2.51.0


  parent reply	other threads:[~2025-10-22  0:31 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-22  0:28 [PATCH v2 00/32] drm/i915/display: Add initial support for Xe3p_LPD Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 01/32] drm/i915/xe3p_lpd: Add Xe3p_LPD display IP features Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 02/32] drm/i915/xe3p_lpd: Drop north display reset option programming Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 03/32] drm/i915/display: Use braces for if-ladder in intel_bw_init_hw() Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 04/32] drm/i915/dram: Add field ecc_impacting_de_bw Gustavo Sousa
2025-10-22 11:37   ` Gustavo Sousa
2025-10-22 11:53     ` Jani Nikula
2025-10-22 12:12       ` Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 05/32] drm/i915/xe3p_lpd: Update bandwidth parameters Gustavo Sousa
2025-10-22 14:56   ` Matt Roper
2025-10-27 22:26     ` Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 06/32] drm/i915/xe3p_lpd: Expand bifield masks dbuf blocks fields Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 07/32] drm/i915/xe3p_lpd: Support UINT16 formats Gustavo Sousa
2025-10-22 12:28   ` Ville Syrjälä
2025-10-22 17:58     ` Matt Roper
2025-10-27 19:41       ` Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 08/32] drm/i915/xe3p_lpd: Extend FBC support to " Gustavo Sousa
2025-10-22 12:39   ` Ville Syrjälä
2025-10-22  0:28 ` [PATCH v2 09/32] drm/i915/xe3p_lpd: Horizontal flip support for linear surfaces Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 10/32] drm/i915/xe3p_lpd: Wait for AUX channel power status Gustavo Sousa
2025-10-29 20:06   ` Matt Roper
2025-10-29 20:50     ` Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 11/32] drm/i915/xe3p_lpd: Underrun debuggability and error codes/hints Gustavo Sousa
2025-10-29 20:54   ` Matt Roper
2025-10-30 21:56     ` Gustavo Sousa
2025-10-31 22:17       ` Matt Roper
2025-10-31 22:41         ` Gustavo Sousa
2025-11-11  0:44         ` Gustavo Sousa
2025-10-22  0:28 ` Gustavo Sousa [this message]
2025-10-22  0:28 ` [PATCH v2 13/32] drm/i915/xe3p_lpd: Adapt to updates on MBUS_CTL/DBUF_CTL registers Gustavo Sousa
2025-10-29 21:22   ` Matt Roper
2025-10-31  2:48     ` Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 14/32] drm/i915/wm: Reorder adjust_wm_latency() for Xe3_LPD Gustavo Sousa
2025-10-29 21:53   ` Matt Roper
2025-10-29 22:22   ` Ville Syrjälä
2025-10-29 22:36     ` Ville Syrjälä
2025-10-30 13:45       ` Gustavo Sousa
2025-10-30 15:38         ` Ville Syrjälä
2025-10-30 13:48     ` Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 15/32] drm/i915/xe3p_lpd: Always apply level-0 watermark adjustment Gustavo Sousa
2025-10-29 22:08   ` Matt Roper
2025-10-29 22:39     ` Ville Syrjälä
2025-10-30 13:53       ` Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 16/32] drm/i915/xe3p_lpd: Add CDCLK table Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 17/32] drm/i915/xe3p_lpd: Load DMC firmware Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 18/32] drm/i915/xe3p_lpd: Drop support for interlace mode Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 19/32] drm/i915/xe3p_lpd: PSR SU minimum lines is 4 Gustavo Sousa
2025-10-29 22:14   ` Matt Roper
2025-10-31 17:36     ` Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 20/32] drm/i915/xe3p_lpd: Enable system caching for FBC Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 21/32] drm/i915/xe3p_lpd: Extend Wa_16025573575 Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 22/32] drm/i915/xe3p_lpd: Don't allow odd ypan or ysize with semiplanar format Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 23/32] drm/i915/xe3p_lpd: Reload DMC MMIO for pipes C and D Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 24/32] drm/i915/xe3p_lpd: Introduce pixel normalizer config support Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 25/32] drm/i915/xe3p_lpd: Add FBC support for FP16 formats Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 26/32] drm/i915/xe3p_lpd: Enable pixel normalizer for fp16 formats for FBC Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 27/32] drm/i915/vbt: Add fields dedicated_external and dyn_port_over_tc Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 28/32] drm/i915/power: Use intel_encoder_is_tc() Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 29/32] drm/i915/display: Handle dedicated external ports in intel_encoder_is_tc() Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 30/32] drm/i915/wm: don't use method1 in Xe3p_LPD onwards Gustavo Sousa
2025-10-22 15:08   ` Shekhar Chauhan
2025-10-22  0:28 ` [PATCH v2 31/32] drm/i915/xe3p_lpd: Extend Type-C flow for static DDI allocation Gustavo Sousa
2025-10-22  0:28 ` [PATCH v2 32/32] drm/i915/nvls: Add NVL-S display support Gustavo Sousa
2025-10-22 15:12   ` Shekhar Chauhan
2025-10-22  1:46 ` ✗ i915.CI.BAT: failure for drm/i915/display: Add initial support for Xe3p_LPD (rev2) Patchwork

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