From: Gustavo Sousa <gustavo.sousa@intel.com>
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: "Ankit Nautiyal" <ankit.k.nautiyal@intel.com>,
"Dnyaneshwar Bhadane" <dnyaneshwar.bhadane@intel.com>,
"Gustavo Sousa" <gustavo.sousa@intel.com>,
"Jouni Högander" <jouni.hogander@intel.com>,
"Juha-pekka Heikkila" <juha-pekka.heikkila@intel.com>,
"Luca Coelho" <luciano.coelho@intel.com>,
"Lucas De Marchi" <lucas.demarchi@intel.com>,
"Matt Atwood" <matthew.s.atwood@intel.com>,
"Matt Roper" <matthew.d.roper@intel.com>,
"Ravi Kumar Vodapalli" <ravi.kumar.vodapalli@intel.com>,
"Shekhar Chauhan" <shekhar.chauhan@intel.com>,
"Vinod Govindapillai" <vinod.govindapillai@intel.com>,
"Sai Teja Pottumuttu" <sai.teja.pottumuttu@intel.com>,
"Chaitanya Kumar Borah" <chaitanya.kumar.borah@intel.com>
Subject: [PATCH v3 07/29] drm/i915/xe3p_lpd: Remove gamma,csc bottom color checks
Date: Mon, 03 Nov 2025 14:17:58 -0300 [thread overview]
Message-ID: <20251103-xe3p_lpd-basic-enabling-v3-7-00e87b510ae7@intel.com> (raw)
In-Reply-To: <20251103-xe3p_lpd-basic-enabling-v3-0-00e87b510ae7@intel.com>
From: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
With Xe3p_LPD, the SKL_BOTTOM_COLOR_GAMMA_ENABLE and
SKL_BOTTOM_COLOR_CSC_ENABLE bits are being removed. Thus, we need not
set gamma_enable nor csc_enable in crtc_state.
Note that GAMMA_MODE.POST_CSC_GAMMA_ENABLE and CSC_MODE.ICL_CSC_ENABLE
are the documented alternatives for the bottom color bits being removed.
But as these suggested bits are being checked in state checker as part
of gamma_mode, csc_mode fields and as gamma_enable/csc_enable are not
being used anywhere else functionally post ICL, we need not set these
fields in crtc_state.
Bspec: 69734
Signed-off-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 1e97020e7304..a217a67ceb43 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1090,18 +1090,19 @@ static void skl_get_config(struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- u32 tmp;
crtc_state->gamma_mode = hsw_read_gamma_mode(crtc);
crtc_state->csc_mode = ilk_read_csc_mode(crtc);
- tmp = intel_de_read(display, SKL_BOTTOM_COLOR(crtc->pipe));
+ if (DISPLAY_VER(display) < 35) {
+ u32 tmp = intel_de_read(display, SKL_BOTTOM_COLOR(crtc->pipe));
- if (tmp & SKL_BOTTOM_COLOR_GAMMA_ENABLE)
- crtc_state->gamma_enable = true;
+ if (tmp & SKL_BOTTOM_COLOR_GAMMA_ENABLE)
+ crtc_state->gamma_enable = true;
- if (tmp & SKL_BOTTOM_COLOR_CSC_ENABLE)
- crtc_state->csc_enable = true;
+ if (tmp & SKL_BOTTOM_COLOR_CSC_ENABLE)
+ crtc_state->csc_enable = true;
+ }
}
static void skl_color_commit_arm(struct intel_dsb *dsb,
--
2.51.0
next prev parent reply other threads:[~2025-11-03 17:20 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-03 17:17 [PATCH v3 00/29] drm/i915/display: Add initial support for Xe3p_LPD Gustavo Sousa
2025-11-03 17:17 ` [PATCH v3 01/29] drm/i915/xe3p_lpd: Add Xe3p_LPD display IP features Gustavo Sousa
2025-11-03 17:17 ` [PATCH v3 02/29] drm/i915/xe3p_lpd: Drop north display reset option programming Gustavo Sousa
2025-11-03 17:17 ` [PATCH v3 03/29] drm/i915/display: Use braces for if-ladder in intel_bw_init_hw() Gustavo Sousa
2025-11-03 17:17 ` [PATCH v3 04/29] drm/i915/xe3p_lpd: Update bandwidth parameters Gustavo Sousa
2025-11-03 17:17 ` [PATCH v3 05/29] drm/i915/xe3p_lpd: Expand bifield masks dbuf blocks fields Gustavo Sousa
2025-11-03 17:17 ` [PATCH v3 06/29] drm/i915/xe3p_lpd: Horizontal flip support for linear surfaces Gustavo Sousa
2025-11-03 17:17 ` Gustavo Sousa [this message]
2025-11-03 17:17 ` [PATCH v3 08/29] drm/i915/xe3p_lpd: Add CDCLK table Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 09/29] drm/i915/xe3p_lpd: Load DMC firmware Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 10/29] drm/i915/xe3p_lpd: Drop support for interlace mode Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 11/29] drm/i915/xe3p_lpd: Extend Wa_16025573575 Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 12/29] drm/i915/xe3p_lpd: Don't allow odd ypan or ysize with semiplanar format Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 13/29] drm/i915/xe3p_lpd: Reload DMC MMIO for pipes C and D Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 14/29] drm/i915/wm: don't use method1 in Xe3p_LPD onwards Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 15/29] drm/i915/dram: Add field ecc_impacting_de_bw Gustavo Sousa
2025-11-03 17:36 ` Matt Roper
2025-11-03 17:18 ` [PATCH v3 16/29] drm/i915/xe3p_lpd: Underrun debuggability and error codes/hints Gustavo Sousa
2025-11-03 21:51 ` Matt Roper
2025-11-05 14:42 ` Gustavo Sousa
2025-11-05 14:54 ` Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 17/29] drm/i915/xe3p_lpd: Log FBC-related debug info for PIPE underrun Gustavo Sousa
2025-11-03 22:30 ` Matt Roper
2025-11-06 15:55 ` Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 18/29] drm/i915/xe3p_lpd: Adapt to updates on MBUS_CTL/DBUF_CTL registers Gustavo Sousa
2025-11-03 17:47 ` Matt Roper
2025-11-03 17:18 ` [PATCH v3 19/29] drm/i915/wm: Do not make latency values monotonic on Xe3 onward Gustavo Sousa
2025-11-03 22:48 ` Matt Roper
2025-11-07 23:53 ` Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 20/29] drm/i915/xe3p_lpd: Always apply WaWmMemoryReadLatency Gustavo Sousa
2025-11-03 18:18 ` Matt Roper
2025-11-03 17:18 ` [PATCH v3 21/29] drm/i915/xe3p_lpd: Enable system caching for FBC Gustavo Sousa
2025-11-04 0:15 ` Matt Roper
2025-11-04 16:16 ` Gustavo Sousa
2025-11-04 16:28 ` Gustavo Sousa
2025-11-04 17:02 ` Govindapillai, Vinod
2025-11-04 16:35 ` Govindapillai, Vinod
2025-11-04 16:58 ` Gustavo Sousa
2025-11-07 23:22 ` Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 22/29] drm/i915/vbt: Add fields dedicated_external and dyn_port_over_tc Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 23/29] drm/i915/power: Use intel_encoder_is_tc() Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 24/29] drm/i915/display: Handle dedicated external ports in intel_encoder_is_tc() Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 25/29] drm/i915/xe3p_lpd: Extend Type-C flow for static DDI allocation Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 26/29] drm/i915/nvls: Add NVL-S display support Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 27/29] drm/i915/display: Use platform check in HAS_LT_PHY() Gustavo Sousa
2025-11-03 17:42 ` Bhadane, Dnyaneshwar
2025-11-03 17:42 ` Matt Roper
2025-11-03 17:44 ` Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 28/29] drm/i915/display: Move HAS_LT_PHY() to intel_display_device.h Gustavo Sousa
2025-11-03 17:39 ` Matt Roper
2025-11-03 17:18 ` [PATCH v3 29/29] drm/i915/display: Use HAS_LT_PHY() for LT PHY AUX power Gustavo Sousa
2025-11-03 17:40 ` Matt Roper
2025-11-03 19:57 ` ✗ i915.CI.BAT: failure for drm/i915/display: Add initial support for Xe3p_LPD (rev3) Patchwork
2025-11-03 20:20 ` Gustavo Sousa
2025-11-04 4:52 ` Ravali, JupallyX
2025-11-04 4:33 ` ✓ i915.CI.BAT: success " Patchwork
2025-11-04 13:37 ` ✓ i915.CI.Full: " Patchwork
2025-11-07 1:02 ` [PATCH v3 00/29] drm/i915/display: Add initial support for Xe3p_LPD Gustavo Sousa
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