Re: [CI] drm/i915/display: change pipe allocation order for discrete platforms

Jani Nikula
2026-03-30T11:37:56Z

On Mon, 16 Mar 2026, Jani Nikula <jani.nikula@intel.com> wrote:
> When big joiner is enabled, it reserves the adjacent pipe as the
> secondary pipe. This happens without the user space knowing, and
> subsequent attempts at using the CRTC with that pipe will fail. If the
> user space does not have a coping mechanism, i.e. trying another CRTC,
> this leads to a black screen.
>
> Try to reduce the impact of the problem on discrete platforms by mapping
> the CRTCs to pipes in order A, C, B, and D. If the user space reserves
> CRTCs in order, this should trick it to using pipes that are more likely
> to be available for and after joining.
>
> Limit this to discrete platforms, which have four pipes, and no eDP, a
> combination that should benefit the most with least drawbacks.

Ville, I think it's time to review and, pretty soon, merge this.

Our IGT changes to deconflate CRTCs and pipes have been merged, and
there's the removal of invalid igt_crtc_t at [1] left. The trybot CI
results on i915 for swapping pipes B and C on all platforms, not just
discrete like here, didn't break anything either anymore [2].

I'm contemplating slapping Cc: stable on this too.

There's the FIXME on the CRTC index warning. With the A+C and B+D
pairing there's no issue, the CRTC indexes remain in that order. But can
we ever really end up with B+C pairing?

BR,
Jani.

[1] https://lore.kernel.org/r/cover.1774856079.git.jani.nikula@intel.com
[2] https://patchwork.freedesktop.org/series/163597/

>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> ---
>
> v2: Also remove WARN_ON()
>
> v3: Limit to discrete
>
> v4: Revamp
>
> v5: Don't screw up the loop variable, dummy
>
> We've fixed a ton of IGT assumptions on CRTC index == pipe, resending
> the patch for CI to gauge where we're at.
> ---
> drivers/gpu/drm/i915/display/intel_crtc.c | 29 ++++++++++++++++++--
> drivers/gpu/drm/i915/display/intel_display.c | 2 ++
> 2 files changed, 28 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
> index b8189cd5d864..c7b6ebe8f3e2 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc.c
> @@ -393,8 +393,6 @@ static int __intel_crtc_init(struct intel_display *display, enum pipe pipe)
>
> cpu_latency_qos_add_request(&crtc->vblank_pm_qos, PM_QOS_DEFAULT_VALUE);
>
> - drm_WARN_ON(display->drm, drm_crtc_index(&crtc->base) != crtc->pipe);
> -
> if (HAS_CASF(display) && crtc->num_scalers >= 2)
> drm_crtc_create_sharpness_strength_property(&crtc->base);
>
> @@ -406,6 +404,31 @@ static int __intel_crtc_init(struct intel_display *display, enum pipe pipe)
> return ret;
> }
>
> +#define HAS_PIPE(display, pipe) (DISPLAY_RUNTIME_INFO(display)->pipe_mask & BIT(pipe))
> +
> +/*
> + * Expose the pipes in order A, C, B, D on discrete platforms to trick user
> + * space into using pipes that are more likely to be available for both a) user
> + * space if pipe B has been reserved for the joiner, and b) the joiner if pipe A
> + * doesn't need the joiner.
> + *
> + * Swap pipes B and C only if both are available i.e. not fused off.
> + */
> +static enum pipe reorder_pipe(struct intel_display *display, enum pipe pipe)
> +{
> + if (!display->platform.dgfx || !HAS_PIPE(display, PIPE_B) || !HAS_PIPE(display, PIPE_C))
> + return pipe;
> +
> + switch (pipe) {
> + case PIPE_B:
> + return PIPE_C;
> + case PIPE_C:
> + return PIPE_B;
> + default:
> + return pipe;
> + }
> +}
> +
> int intel_crtc_init(struct intel_display *display)
> {
> enum pipe pipe;
> @@ -415,7 +438,7 @@ int intel_crtc_init(struct intel_display *display)
> INTEL_NUM_PIPES(display), str_plural(INTEL_NUM_PIPES(display)));
>
> for_each_pipe(display, pipe) {
> - ret = __intel_crtc_init(display, pipe);
> + ret = __intel_crtc_init(display, reorder_pipe(display, pipe));
> if (ret)
> return ret;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index b18ce0c36a64..f0843de362fb 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5971,6 +5971,8 @@ static int intel_atomic_check_joiner(struct intel_atomic_state *state,
> * This works because the crtcs are created in pipe order,
> * and the hardware requires primary pipe < secondary pipe as well.
> * Should that change we need to rethink the logic.
> + *
> + * FIXME: What about with reordered pipes?
> */
> if (WARN_ON(drm_crtc_index(&primary_crtc->base) >
> drm_crtc_index(&secondary_crtc->base)))

--
Jani Nikula, Intel