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charset=iso-8859-2 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <2df6f595-da57-0668-951c-657c5c876333@intel.com> X-Spamd-Result: default: False [-3.50 / 50.00]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_RHS_NOT_FQDN(0.50)[]; HAS_REPLYTO(0.30)[pvorel@suse.cz]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MISSING_XM_UA(0.00)[]; TO_DN_SOME(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; FUZZY_RATELIMITED(0.00)[rspamd.com]; RCVD_TLS_ALL(0.00)[]; DKIM_SIGNED(0.00)[suse.cz:s=susede2_rsa,suse.cz:s=susede2_ed25519]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_SEVEN(0.00)[10]; FROM_EQ_ENVFROM(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; REPLYTO_EQ_FROM(0.00)[] X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: Petr Vorel Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Hi Micha³, all, > Hi Petr & Oliver, > > in our tests, it's quite persistent and clean on parent: > I haven't reproduced it myself, but this issue seems somewhat related > with issue observed earlier by CI [1]. I would expect it to not be a > random glitch but a true bug related to the series. > In previous versions of the series, during parsing there was a > unfortunate snippet of: > + const u32 *tables = block->tables; > + size_t offset = 0; > + size_t row_width; > + const u32 *vals; > + > + row_width = block->num_columns * sizeof(*tables); > + > + for (int idx = 0; idx < block->num_tables; idx++) { > + for (int row = 0; row < num_rows; row++) { > + vals = &tables[offset]; > [...] > + offset += row_width; > + } > + } > Which caused hopping by 4 times more bytes than it should, because the > sizeof() wasn't meant to be there. Since parsing takes place at module > load, looks like it could be the issue. This seems especially convincing > given that report is from parse_vswing_preemph_snps(). I have to also > admit that it would be consistent with review comment from Sashiko [2]. > Lastly, sadly due to poorly split commits, 15th patch from v1 turned on > whole VBT #57 searching. This probably caused bisect to point at 15th > patch instead of pointing at patch adding parsing code, which would > clearly show that patch/es introduce/s the bug. > Anyways, now the bug should be fixed in v2 [3]. Micha³, thanks a lot for pointing pointing this out. Kind regards, Petr > [1] https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164196v1/fi-hsw-4770/dmesg0.txt > [2] https://sashiko.dev/#/patchset/20260331183332.1773886-1-michal.grzelak%40intel.com?part=5 > [3] https://lore.kernel.org/intel-gfx/20260415234639.3577774-21-michal.grzelak@intel.com/ > BR, > Micha³