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Fri, 04 Sep 2026 06:32:34 -0700 (PDT) Received: from jake-laptop ([153.67.39.26]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-91041fa4d65sm14043076d6.15.2026.09.04.06.32.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Sep 2026 06:32:33 -0700 (PDT) From: Jake Steinman To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?UTF-8?q?Jouni=20H=C3=B6gander?= , Animesh Manna , =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= , Jani Nikula Subject: Re: [PATCH v3] drm/i915/alpm: Add a quirk to keep the fast wake ahead of the IO buffer wake Date: Fri, 4 Sep 2026 09:32:31 -0400 Message-ID: <20260904133231.9028-1-j@metarealtyinc.ca> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260904114835.483057-1-j@metarealtyinc.ca> References: <20260903131724.49496-1-j@metarealtyinc.ca> <20260904004308.185788-1-j@metarealtyinc.ca> <20260904114835.483057-1-j@metarealtyinc.ca> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Mailman-Approved-At: Tue, 08 Sep 2026 18:37:36 +0000 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Fri, 2026-09-04 Jouni Högander wrote: > I think PSR2 was working on that setup at the point when I introduced > that quirk > ... > Maybe this is actually matter of bisection? Checked that today with a probe that only polls the sink (0x2006, 0x2008, 0x200a every 200 ms, error bit cleared after each read), so it runs the same on any kernel: stock 7.2.2, io/fast 11/11: CRC error re-latched on every poll, 0x2008 = 3 throughout, 0x200a shows SU_VALID in 2 of 94 polls 7.3-rc1, io/fast 11/11: same, SU_VALID in 7 of 90 polls 7.3-rc1, io/fast 11/12: no CRC errors, 0x2008 = 2, SU_VALID never So what looks like PSR2 working is the link failing on every wake and the engine re-entering over and over. Each re-entry does its two entry captures, those carry SU_VALID, then the engine parks in SU_STANDBY until the next failed wake resets it. Screen updates come from the resyncs, not from selective updates. With the wake clean there are no resyncs and the panel stays on the stale frame. I doubt bisecting finds anything for PSR2: it was in this state in April too unless the wake formulas were different then, and intel_alpm.c has four commits since March, none touching them. Panel Replay uses the aux-less wake, which does not fail, so it froze outright from the start. That is the quirk. Probe script and logs are on 9119. Jake