From mboxrd@z Thu Jan  1 00:00:00 1970
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Subject: Re: [passive aggressive RESEND 1/2] drm/i915: Mark CPU
 cache as dirty on every transition for CPU writes
Date: Fri, 16 Jun 2017 13:59:38 +0100
Message-ID: <237d6aaa-e3c3-9331-53bd-3a865afd4df5@linux.intel.com>
References: <20170615123850.26843-1-chris@chris-wilson.co.uk>
 <a3f9536b-ee4a-c45f-14bf-34ca8f4b35c8@linux.intel.com>
 <149761240214.20055.10161546174567842344@mail.alporthouse.com>
 <2c73fc1c-5d18-ff4c-1033-96f8c98798be@linux.intel.com>
 <149761523579.20055.12787594416278113763@mail.alporthouse.com>
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